USB low-full-high speed peripherals Forum Discussions

Hi,
We are designing a system with the cypress USB chip in slave FIFO mode talking to a FPGA. the firmware is based on the AN61345 application note. 
Its configured in in slave FIFO mode with EP2,4,6,8 using double buffering. In 8% of the cases, when the user application tries to send data packets, the cypress issues a NYET response. then the PING-NAK times out. Then the PC stops sending any more requests to the chip over the wire. We observed it with a USB protocol analyzer. When the cypress firmware enters this state it does not recover till we unplug it and plug it back in. Then communication resumes. We are completely lost on what would cause this. EP2 is OUT, EP4 is IN, EP6 is OUT, EP8 is IN. Its a self powered device but in firmware its configured as a bus powered device. I don't know what the impact of this is. Also, I had to disable the system going into "Sleep" mode to see if it worked. But it did not when the PC was powered on first and then the instrument was turned on. 
We are completely confused what could be causing this error, and It needs to be fixed soon. Please help.
Thanks

Hi ,

I am having trouble with my system going into suspend and never coming out of it. I had to comment out the block in the main loop that handles TD_SUSPEND and TD_RESUME. I also have Rwuen set to False. In the current state sometimes during startup, the cypress firmware enters suspend mode and never comes out of it. Sometimes it enumerates as Unknown device.

I am really confused about how to safely handle a suspend and resume in the cypress firmware. I followed the AN61345 app note. My design does not have VBUS monitoring. The WAKEUP pin is tied to 3.3V. The FPGA is the master and the Cypress is the slave being run in slave FIFO mode using indexed flags. I am using all 4 endpoints 2,4,6,8 double buffered. AutoIn and Auto out enabled.

I really need someone from Cypress to take a look at my code and tell me what I am missing. I have read the Tech manuals several times and could not figure out what needs to be done.

Please help

Thanks

Victor Selvaraj

The fpga usb(cy7c68013) works, but how can I save the data to PC? Does anyone have a software can do this?

Hello

I have a custom design with CY7C68013a controller. Most of the time the device including software is working well but sometimes it seems that the there is a startup problem.

The problem occurs at random. Sometimes, after power up (without connecting to a PC), it seems that the controller does not start
Sometimes the controller starts and after I connect the USB cable the controller it hangs
I am also able to set this hanging state if I put my finger to the D+ line of the USB.

I already checked:
Reset circuit
Oscillator (24Mhz) and 22 pf capacitors
power supply should be O.K.
AVCC is separated from VCC by inductor MLB-160808-0300PN

Does anybody have an idea what the problem could be please?

Friendly regards and thak you for your hints in advance

Geri
 

Dear Cypress Community,

We are working with Fx2-device CYC68013A and also using the latest Cyusb3 driver package.
The driver communication is done via IOCTL functions.
Sometimes we have to deal with noisy environment where EMI-sources might have a significant impact to the USB signal quality.

On the low-level site, every transfer is normally stuffed by a couple of different status informations like Framing-Errors/CRC-Error/Ack-Errors,...a.s.o.
(like the USBD-status as denoted in the USB2.0 specification).
Additionally there are also error counter available which are incremented after a transfer fails.
These informations will be highly interesting if you have to evaluate EMI and cable quality issues.

Now the question:
Are there any possibilities to readout this (low-level) informations from the driver or are there other possible sources (API-functions to access the USB-host driver status,...)
which will provide the low level transfer status?

p.s.: The USBD status which is part of the "Single_Transfer" structure in the CyUSB driver shows always zero .I think this is normal since an overlapped transfer call return always immediately with IO_PENDING and there is no other possibility to get dedicated informations about the usbdstatus/ntstatus while using the DeviceIOControl-function.

Thanks in advance,

Wilhelm

Hello,

For one of our projects, we are building a custom solution (hardware and software) based on a FPGA and a FX3 USB 3.0 controller.

When powering up our custom board, the FX3 enumerate itself with these parameters: VID=0x04B4, PID = 0x0053. After uploading a firmware in the RAM (via Control Center for example), the device re-enumerate itself with the new tuple (VID, PID) on both Windows and Linux.

Right now, we have developed a custom python script with libusb to upload firmware in the FX3 RAM. The transfer works flawlessly. For example, if  we write a firmware with a blinking led, the default bootloader and after program jump entry USB command, the led blink. So far so good, but if we look at the USB enumeration process, we can see, via dmesg, that the device is not re-enumerated and disconnected. 

According to Cypress datasheet, this behaviour is totally normal, however this is not the one we want. Is this possible to force the USB to re-enumerate itself and be seen by the linux machine after  program jump entry command ?

Best regards,

Christophe FAUVEL

PS: The observations described below have been made on a CYUSB3KIT-003 board also.

Hi every body,

I want to built read-only(write protect) and write-only(copy protect) usb flash driver. Can I use CY3686 EZ-USB NX2LP-Flex for this purpose?? Can I wtire mu own program to control USB bus and allow host to read only data or just write it?

Thanks in advanced.

I need driver for windows 7 for device cy7c68013a-56pvxc.

Is there driver for this device?

I am trying to get the SDK up and running using microsoft visual studio express 2013 for windows desktop. I have installed the PLX SDK as well, but when I try to execute the test bench example project I get an error that appears in the windows command window; "Please define the CY_USE_PLX symbol to compile with the PLX library." 

How do I fix this issue?

I am working on a USB drive prototype using cy7C68033 and a NAND flash (Samsung K9KWBG08U1M, 4G byte chip), and found that, upon plug in, the device will be enumerated as "Cypress FX2 - No EEPROM"; however, once I start NX2LP Programmer utility, it will be enumerated as a mass storage device (and drive letter will come out).  Firstly I though it was my firmware error and programmed the default firmware (CY3686FW included in the development kit) but the result was the same.

When the device is enumated as "Cypress FX2 - No EEPROM", it has a VID of 04B4 and PID of 8613, which is different from what I programmed using the NX2LP programmer utility, so probably the chip just failed to read the nand flash - am I correct?

Could someone help me to determine what is keeping the chip from working?  Thanks in advance.