USB low-full-high speed peripherals Forum Discussions

i download the hex into fx2lp's ram ,but it can not function , so i use the oscillograph to view the waveform of  SDA pin.it shows that ,as long as i download the hex file into the ram using the control panel and click the reconnect button , the waveform is a endless square wave . after that, my control panel crashed. what should i do ???

I have built a FPGA project to test the slave FIFO, I found that when FIFO size is set to 512 or 1024, the FF flag wil go active when 512 or 1024 words are written into the FIFO, it seems there is no relationship between 2x, 3x, or 4x of FIFO depth, is it the truth? why?

hello,

Please give a API code or syntax for the data transfer to and from the endpoint for FX3.

example:

uint8_t glEp0Buffero[32] __attribute__ ((aligned (32)));

uint8_t glEp0Bufferi[32] __attribute__ ((aligned (32)));

I want to do below operation:

glEp0Buffero[32] -> out Endpoint (0x02)       and

in endpoint (0x82) ->  glEp0Bufferi[32]

Hi,

Please suggest me the most optimal driver structure for my situation:

1. I have two devices, one on an2131 and another on fx1. Both with the host-loaded firmwares.

2. Support for XP, Win7, Win 8/8.1, 10, 32/64 bit, except for XP (32 bit is enough).

As for now, I have two directories, "x86" and "x64". Each dir structure is as following:

dev.inf 

ezload.sys+ezload.spt (firmware loader, spt file goes to system32\devload dir by the dev.inf)

fxload.sys+fxload.spt (same thing for fx1)

cyusb.sys (general access driver for the both firmware loaded devs)

ezusb.dll (my own client-side interfacing dll, works with cyusb.sys, copied to system32 to make things easier)

dev.cat (for the sake of digital signing)

ezload.sys and fxload.sys are the same cyusb.sys, renamed. This is to enable driver work when another twin device (remember, we should be able to use our an2131 and fx1 devices simultaneously)  driver gets removed.

This stuff works, but we have a little problem: to remove/update firmware loading driver we need to manually delete spt file to make an spt loader .sys fail to operate. Otherwise, the loader starts and downloads so fast that we cannot catch it to delete in the windows dev manager!

And I'd like to have "one-button" install/remove procedure for the driver, if possible.

I'm trying to play with the dpinst.exe now but it's not that perfect either (though it removes the driver ok, both fw and non-fw instances, to the "Unknown Device" state, that's great). How it must be invoked by user? Seems like it's better to wrap dpinst by some installer creating app. Also, what I don't like about dpinst.exe is that it autocreates a package name using first model name found in INF (if I got it right). We have two devices so that is confusing to name only one, not the family. We could disable dpinst' control panel item creation and use some custom item created by an installer app. But I have doubts if this engineering is really optimal.

What do you think? What is the best practice for my case?

p.s. We are new to driver signing so being scared by Microsoft claims to stop supporting SHA-1, we sign it with SHA-2. Is that the right way we did it?

Regards,

Dmitry

I am using custom board of ez-usbfx2lp .it has large eeprom .i am downloading vend-ax sample .iic to my board but device  is not recognized.

some other examples are working ie cystreamer etc but vend_ax not working wht is problem

usb vend-ax not working

I am using custom board of ez-usbfx2lp .it has large eeprom .i am downloading vend-ax sample .iic to my board but device  is not recognized.

some other examples are working ie cystreamer etc but vend_ax not working wht is problem

The documentation is not entirely clear, so I would like to clarify the following:

1) While in Slave FIFO mode - doing Slave FIFO writes (external master outputs to FX2LP data bus inputs - SLWR asserted, IFCLK generated from external master, SLCS asserted = chip select enabled) can I use SLOE as an input?

     SLOE is stated to affect the behavior when doing an SLRD.  SLOE assertions tristate the database so FX2LP does not drive the bus when SLOE is de-asserted.   However, if SLRD is deasserted - this will also "tristate" the data bus since either the part is not being asked to output values (SLRD and SLWR are deasserted) OR the part is being asked to handle a write (SLRD deasserted, SLWR asserted) in which case the buffers will be configured as inputs.

     Does this mean that SLOE is a "don't care" for the case where SLCS# (active low) = 0, SLRD (active high) = 0, and SLWR (active high) = 1 or 0.   We only use SLWR and never SLRD so sometimes there is data on the bus to read in which case SLWR will assert.

     I want to make sure that SLOE does not also internally disconnect the data bus for inputs (during a slave fifo write).

     Second part of the question is - that if SLOE is a "don't care" in the given scenario - can I read the state of SLOE to see if SLOE is asserted or not through firmware (8051)?  I'm not sure if the port register for Port A will reflect the SLOE state in slave fifo write mode or if a read of SLOE will result in an invalid/unknown return (or always high or low - not reflecting SLOE).

     The "trick" for SLOE I would like to gain an input since I never use SLRD which seems most tied to SLOE.

I see FX2LP documentation (latest datasheet) shows the pin state of all pins while in reset mode.   There is no documentation that I can see which states that suspend mode is equivalent to a reset state.  I only see mention that "some sub-systems will be in reset" but not that suspend, with respect to pin states, is exactly the same as the pins in reset state.

For instance, in RESET state (reset asserted) I see the datasheet shows FLAGA-FLAGC will be driven​ low (show as "L" in reset column, not high Z like most).   This is a useful feature for me - I will not convolute the question with those details.   However, is it true that USB suspend holds the pin states the exact same as the RESET state in the datasheet - or is there any reference as to what the pin states should be?

I use Cypress CY7C68013A EZ-USB FX2LP USB2.0  development board with Windows 7.

Is there any Python library that could help me to access a device via I2C protocol from my Windows?