USB low-full-high speed peripherals Forum Discussions

Hi,

  I couldn't find the WHQL test report for cyusb.sys(FXLP2 windows driver)on cypress website. Does cypress provide this report and where can i get from? thanks.

Hello sir,

I have one application and it is based on the following serial communication settings

Baud Rate:9600

Data Bits:7 bit

Parity:Even

Stop Bits:1

Flow Control:None

I have been using cypress ic CYC64225 with 9600 8-N-1

But this IC does not support 7-bit data format.

I have my hardware ready and I don't want to change it so finding pin to pin compatiblity with this IC.

Please suggest me IC part number which support 7/8 bit data format and also pin compatiblity with existing one.

Hi,

I'm working with CyUsbS234 (CY7C65211)

I have already tested the kit on Windows, it works ok.

I can also use it on my Linux platform, with linux SDK and libusb.

To get more gpio and i2c, I need to change the serial port mode from mode 0 (default) to mode 5. 

There is no API to change the serial port in the CyUSBSerial API Document. 

I need to change the serial port mode at runtime in linux system. 

Can someone help me? Thanks.

Q1:I get "When AUTOOUT=1, as soon as a buffer fills with USB data, the buffer is automatically and
instantaneously committed to the endpoint FIFO bypassing the CPU" from FX2 TRM,can you give me more details about the differences and relations between endpoint FIFO and buffer, and how about is it in AUTOIN? 

Q2:The state of EF,FF,(PF) is given in EP2468STAT and EP24FIFOFLGS,and the state of EF,FF and PF can also be expressed by flagA(or flagB flagC). The states all above are identical ?

thank you!

Hi all,

Using the "ControlCenter" application available into FX3 SDK I see that a .iic firmware file can be wrote, into a FX2 coupled EEPROM, in a fraction of the time needed for the same operation performed by the old FX2's "ControlCenter". This is very interesting...

I understand that this operation is performed by LoadEEPROM function available into the new CyUSB .NET library. But is it possible to implement the same thing in a custom fw/sw? Can you provide the fw/sw source to perform such R/W speedy operations on FX2 coupled EEPROM?

Thanks a lot.

Hi,

I am using a image-collecting system based on the Cypress 68013. But I am not the hardware person, this is my partner's work. I just need to do the PC application.

Now when I only receive data and not do other things in my app, I can receive stable data rates up to 22Mbytes/s.

However if I do some data processing in another thread, the data rates will be not stable that in fact the data sometimes can't be received completely(the waitForDataXfer is timeout). I use your "streamer" application as an example to design my app. My experimental desk computer is not a new one with winxp system and old i3 cpu. In other hand, my app can work stably on my PC with i5 cpu and win8.1 system.

The last, I want to say the imaging-collecting system I used doesn't have a ram buffer to store one frame from the cmos imaging sensor. It will transmit a frame to the PC if it gets PC's request code for a simple agreement. That is to say sometimes I can't receive a frame in time and completely with the asynchronous method （BeginDataXfer/WaitForXfer/FinishDataXfer）that Cypress offered. My image frame is 1280 * 720.

Thank you for help.

Hi all

    I use the C2 boot mode of 68013a, some times when I power off the 68013 system, it become a unkown device when next reboot, after then I checked the data in EEPROM, find that the PID&VID was rewrote, after a series of power-off test, meanwhile capture the waves on IIC SCL and SDA line, we recreate the problem, in the moment of system power off, some random pulse on SCL and SDA line rewrites the EEPROM.

   In my 68013a firmware ,I need to read or write EEPROM, so I connect the EEPROM WP(write protect, active high) pin to Vcc by a resistance, and also connect a 68013a GPIO to WP pin, when I need to write the EEPROM, I set the 68013a GPIO low to deactive the EEPROM write protect, and set it high after write operation. the problem is that, from the wave we capture, in the moment of power off, the EEPROM WP pin is pulled down before the EEPROM is still working, that means when random pulse apears on SCL and SDA, the WP pin is low, and I ensure that no software EEPROM write operation is executing in the moment of power off.

   Why is there such a problem? and How to resolve this problem?

 Hi all, is there any example for fx2lp to demonstrate how to control the gpio pins at cy3684 fx2lp development kit?

Currently, I don't know where to start, please kindly give me some tip or direction.

Thanks.

I have no experience with cypress and want to program a USB FX2LP CY7C68013A. I read that with EZ-USB FX2LP USB2.0 Develope Board Logic Analyzer Module bought on ebay can be programmer. I dont know if there is an adapter for CY7C68013A with 56 pins or in what way do the connections between CY7C68013A pins and the programmer. I would also like to know if are some specific pins which must be used or if they are all chip pins.

I purchased the CYUSB232 to interface with some older computer hardware. Using the example of installing, opening tera term and patching TXD and RXD together all works fine, but if I do not hook TXD and RXD together I get nothing but line noise, garbage on the screen and it increases if I move my hand near the device. If I try to plug it into the older hardware I am trying to work with it continues. This happens on 2 different desk tops (Windows 7, XP and on a laptop (windows 7). Is there anyway of eliminating this noise? It is not coming from anything touching the device and only goes away if I jumper the TXD and RXD together. It happens at any baud rate I set it too. It also happens if I use Putty instead of tera term