USB low-full-high speed peripherals Forum Discussions
Apologies if this has been answered elsewhere but I have been unable to find anything. I am new to the CyAPI and am trying to write a C++ application to communicate with a CY7C68013A. However, whenever I attempt a read/write to the control endpoint, I see an error 997. The functional part of my code is here:
CCyControlEndPoint *ept = USBDevice->ControlEndPt;
ept->Target = TGT_DEVICE;
ept->ReqType = REQ_VENDOR;
ept->Direction = DIR_TO_DEVICE;
ept->ReqCode = 0xA0;
ept->Index = 0x0000;
unsigned char buf[64];
ZeroMemory(buf, 64);
ept->Value = 0xE600;
LONG buflen = 1;
buf[0] = 1;
ept->XferData(buf, buflen);ept->Direction = DIR_FROM_DEVICE;
ept->Value = 0xE60A;
buflen = 1;ept->XferData(buf, buflen);
cout << "Data: " << hex << (int)buf[0] << dec << "\nError code: " << ept->LastError << '\n';
According to the documentation I've seen, this register should output a value of "1"; however, I get "5e". In fact, for any register I try to access, I get "5e 6f" repeating. Is there something I am missing about setting up the control endpoint or how I'm using it?
Thanks,
Scott
Show LessDear sir,
When I connect my cy7c68013a board to PC, the device manager displayed "unknown device".
The configuation of cy7c68013a is as follows:
1.The cystal frequency is 24.5760Mhz, I use 22pf capactor connect to each pin of cystal.
2.wakeup pin is connected to 3.3V via 10k resistor
3.reset pin is connected to 3.3V with 10k resistor and with 10uf capacitor to GND。
4.reserved pin is connected GND with 10k resistor
5.SCL and SDA pulled up using 2.2k resistor
6.BKPT is connected to GND with 1k resistor and a led
7.EEPROM is not connected to cy7c68013a, I removed the jumper on SDA line.
I modified the cysub.inf and tried to load the cyusb.sys manually, but an err message showed up "指定的位置不包含有关硬件的信息".
please please help me~!
Show LessHello,
with the USB-Serial Configuration Utility is possible to set some string descriptors(1):
.Manufacturer
.Product
.Serial Number
The cyusbserial API, however, doesn't contain any function to set these strings.
Manually set the device serial number is adequate only during the prototyping phase.
Once in production, we will need to automatically generate and set a serial number for each device.
Could you please tell me how to do it?
Best regards,
Stefano Zanchi
(1) see attached file
Show LessHello?
I am new here.
A few years ago, we had developed a UVC camera using fx2 + fpga(CY7C68013, XC9536XL).
My senior engineer has resigned recently. But, he didn't gave me any diver for the camera.
Where can I find the driver running on Windows 8/10?
Thank you.
Tony Kwon.
Show LessHi all,
I have used CY7C68013A-56LTXI (industrial version) as USB 2.0 controller.
I will check this controller chip for automotive.
If CY7C68013A-56LTXI could not be used for automotive,
I want to know which chip can.
Regards, thank you.
Kim
Hi-
I'm new to using the Cypress chips (FX2), and I'm looking for some pointers on getting started with CyUSB.net ...
I have the FX2LP set up in FIFO mode, bulk endpoint (IN) on EP6, which is connected to an FPGA that generates packets to send. This is based on the AN61345 slave FIFO app note, but modified so it puts a data packet in the FIFO every 0.5 ms. I can read this data using the Streamer C# application (AN4053), or the Control Center. I can make a simple C# program of my own that reads packets, based on these examples.
To this point, I've usually used RS232 (or CDC device class), for which the process typically is:
1. open a handle to the port (CreateHandle)
2. this causes the operating system to buffer data until read by the application; also, it grants exclusive access
3. read data
4. close the port when done
5. if the operating system's buffer overflowed, an error flag is set that the program can see
Using CyUSB.net...
1. Is there an equivalent of "opening the endpoint"? I don't see an equivalent way to signal to CyUSB, "hey, direct all incoming packets to my application!"
2. How do I guarantee that I get all packets in order, with none lost?
3. How do I guarantee exclusive access for my program?
For example, I can run 2 instances of the Streamer example side-by-side, and neither knows that it is losing half the data to the other program!
Thanks!
Show LessI would like to know if it is possible to read the PROM of this chip to program other chips with the same firmware. I only have one programmed microcontroller.
Show LessDear All,
I refer to the design("AN61345 - Slave FIFO Interface using fpga"), and have been able to get the data, but this is not I want, the packet is too large; I hope to get a packet just 20 bytes, after to send 20 bytes data the fpga will output(PA6) a end packet signal to 68013, but I have modified the 68013 code, always can't succeed, so hope to get your help, thank you!
GS Xie
Show LessDear Experts,
I am using CY7C68013A-56pin + FPGA for camera data capture based on slave FIFO interface. My pipe plan: IN: video data; OUT: cmd data takes only few bytes and will be sent from host pc to FPGA occasionally. I refer EZ-USB TRM 001-13670_OE.pdf (page 30, Fig.1-17) for the endpoint buffer configuration selection. My question is that based on Fig.1-17, which configuration is the best for my project. Actually I feel #11 maybe the selection but my OUT data is only few bytes which will be sent occasionally only. So is there any other better selection for the OUT pipe? Actually I considered EP1 OUT but finally I found it is not included in the slave fifo interface. So I need your advices on this issue. Thanks.
Brian Bai
Show Less