USB low-full-high speed peripherals Forum Discussions
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USB low-full-high speed peripherals
I am trying to run a USB sample program on CY8C24894 device. I made a new board and the device on the board is prorgammed fine wiht PSoC minip...
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I am trying to run a USB sample program on CY8C24894 device. I made a new board and the device on the board is prorgammed fine wiht PSoC miniprorgammer. However USB is not detected by the PC. I created a new project absed on the AN50989
The same program created for CY8C24794 on the development board does works fine
I duplicated the following for my device from AN50989:
1] Sample C program
2] POrt connections as in GUI setup
3] USB setup for HID device class
I downloaded another sample application for this device . This time PC detects the USB and installs device driver. Howvever, when I am trying to access the device through GUID interface, I get VID=0 and PID=0.
I donot know if I am missing something.
I would apprecite your help.
Thanks in advance.
DK
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The same program created for CY8C24794 on the development board does works fine
I duplicated the following for my device from AN50989:
1] Sample C program
2] POrt connections as in GUI setup
3] USB setup for HID device class
I downloaded another sample application for this device . This time PC detects the USB and installs device driver. Howvever, when I am trying to access the device through GUID interface, I get VID=0 and PID=0.
I donot know if I am missing something.
I would apprecite your help.
Thanks in advance.
DK
Show Less
USB low-full-high speed peripherals
Hello! Can anyone help me for my project to build an wireless usb application like wireless webcam. Is CYRF7936 with 4MHz channel bandwidth an...
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Hello! Can anyone help me for my project to build an wireless usb application like wireless webcam. Is CYRF7936 with 4MHz channel bandwidth and 62.5kbps data rate, is it possible to transmit the output of a webcam via wireless.
I want to ask that, can we use CYRF7936 to make the wireless webcam using wired one? If not then which chip can be used to make it wireless and if yes then, what considerations should be undertaken.
Thank you
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I want to ask that, can we use CYRF7936 to make the wireless webcam using wired one? If not then which chip can be used to make it wireless and if yes then, what considerations should be undertaken.
Thank you
Show Less
USB low-full-high speed peripherals
We are evaluting your FX2 for a company project.
I am trying the examples on our brand new cy3684 kit and I notice that although they work, I can make trivial one line changes to the code and have unrelated functionality break. It is like the linker is moving code around based on these changes and losing alignment or putting things where there is no memory.
What linker settings are recommended for these examples? All that comes with it out of the box is that code should be above 0x0080 and xdata is above 0x1000. Also, I see RAMSIZE at 256. Is that it? Do you set up a stack or anything?
I can change a loop counter in a function that is never executed from WORD to DWORD and toggle the Endpoint 4 bulk transfers to work and not work. The loop counter is in code that never executes and is absolutely unrelated to this endpoint 4 stuff.
I start with an example that has the bulk transfers working like bulkloop.c and a couple vendor commands, get chip revision and a few others.
I add a single function to Vend_Ax.c that I don't even call. If I do call it, it makes no difference to the experiment. It is as follows:
BOOL Init();
BOOL Init() {
WORD i;
for (i = 0; i < 20; i++); // delay at least 2us
for (i = 0; i < 1000; i++); // delay at least 5us
//
// Check the status lines
//
return 0;
}
If you change the "WORD i;" line to "DWORD i;", then run the bulk transfer out Endpoint 4 using CyConsole, the bulk transfer will succeed, but the USB will stall with the next vendor command. You do not even have to call this function, just having it declared produces the problem. I am guessing I need better linker settings. Show Less
We are evaluting your FX2 for a company project. I am trying the examples on our brand new cy3684 kit and I notice that although they work,...
Show More
We are evaluting your FX2 for a company project.
I am trying the examples on our brand new cy3684 kit and I notice that although they work, I can make trivial one line changes to the code and have unrelated functionality break. It is like the linker is moving code around based on these changes and losing alignment or putting things where there is no memory.
What linker settings are recommended for these examples? All that comes with it out of the box is that code should be above 0x0080 and xdata is above 0x1000. Also, I see RAMSIZE at 256. Is that it? Do you set up a stack or anything?
I can change a loop counter in a function that is never executed from WORD to DWORD and toggle the Endpoint 4 bulk transfers to work and not work. The loop counter is in code that never executes and is absolutely unrelated to this endpoint 4 stuff.
I start with an example that has the bulk transfers working like bulkloop.c and a couple vendor commands, get chip revision and a few others.
I add a single function to Vend_Ax.c that I don't even call. If I do call it, it makes no difference to the experiment. It is as follows:
BOOL Init();
BOOL Init() {
WORD i;
for (i = 0; i < 20; i++); // delay at least 2us
for (i = 0; i < 1000; i++); // delay at least 5us
//
// Check the status lines
//
return 0;
}
If you change the "WORD i;" line to "DWORD i;", then run the bulk transfer out Endpoint 4 using CyConsole, the bulk transfer will succeed, but the USB will stall with the next vendor command. You do not even have to call this function, just having it declared produces the problem. I am guessing I need better linker settings. Show Less
USB low-full-high speed peripherals
Hi, I have a product that uses the Cy7C65640 TetraHub. In order to curb heat dissipation on the PCB, we decided to enable Fullspeed onl...
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Hi,
I have a product that uses the Cy7C65640 TetraHub. In order to curb heat dissipation on the PCB, we decided to enable Fullspeed only. In our product, this works fine. But we are making a test for this PCB that connects to a computer in order to determine functionality.
When the EEPROM is not connected, the default Highspeed mode works well with the PC. But, for some reason, even though the Fullspeed works with the product we wish to integrate it with, when connected to the PC, none of the downstream ports power up.
Here's the Hex number that I feed the EEPROM:
D200000000000088FF326432A0
Most of the number is default or recommended.
Any help would be appreciated.
Thanks,
Matt Show Less
I have a product that uses the Cy7C65640 TetraHub. In order to curb heat dissipation on the PCB, we decided to enable Fullspeed only. In our product, this works fine. But we are making a test for this PCB that connects to a computer in order to determine functionality.
When the EEPROM is not connected, the default Highspeed mode works well with the PC. But, for some reason, even though the Fullspeed works with the product we wish to integrate it with, when connected to the PC, none of the downstream ports power up.
Here's the Hex number that I feed the EEPROM:
D200000000000088FF326432A0
Most of the number is default or recommended.
Any help would be appreciated.
Thanks,
Matt Show Less
USB low-full-high speed peripherals
I get a new drive for flash memory in my PC with CY3686 and two nand flash chips (K9K4G08U9M of 512MBytes that come with the development kit)....
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I get a new drive for flash memory in my PC with CY3686 and two nand flash chips (K9K4G08U9M of 512MBytes that come with the development kit). But I cannot get it working with chips of 1GByte. Does anyone know how to solve this or found the same problem?
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USB low-full-high speed peripherals
I'm working on a system that use 11 controller from Diolan ( u2c-12 ). For some strange reason, I cannot access more than 8 controllers ( got ...
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I'm working on a system that use 11 controller from Diolan ( u2c-12 ). For some strange reason, I cannot access more than 8 controllers ( got the exclamation mark in the device manager that state that windows cannot load the driver for the device ). Anyone have an idea ? Is it the OS or the driver from Diolan ! By the way, Diolan support is horrible : e-mailed then twice and called them 3 times since last week and no response at all !
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USB low-full-high speed peripherals
I have set up EP4 on an FX2 as an IN endpoint, operating in Full speed mode (USB 1.1). The packet size is set to 64 bytes, and EP4 is confi...
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I have set up EP4 on an FX2 as an IN endpoint, operating in Full speed mode (USB 1.1). The packet size is set to 64 bytes, and EP4 is configured for double buffering ( which apparently is the only available option) and AUTOIN=1.
A couple of questions --
1. On programming EP4FIFOPFH/PFL with DECIS = 1, PKTSTAT = 0 and IN: PKTS[1:0] = 0, PFC[5:0] = 32, after the external master writes the 32nd byte, the full flag gets asserted ( after a delay tXFLG). The external master continues to write an arbitrary number of bytes (say, 12), before deasserting SLWR. Would this lead to a deadlock situation, as the FIFO is "full", and it can never empty as there isn't a complete packet yet (only 44 bytes in the FIFO, which is lesser than the 64 bytes required to complete a packet)?
2. Is setting PKTSTAT = 1 the same as {PKTSTAT=0, IN: PKTS[1:0] = 0}?
Thanks. Show Less
A couple of questions --
1. On programming EP4FIFOPFH/PFL with DECIS = 1, PKTSTAT = 0 and IN: PKTS[1:0] = 0, PFC[5:0] = 32, after the external master writes the 32nd byte, the full flag gets asserted ( after a delay tXFLG). The external master continues to write an arbitrary number of bytes (say, 12), before deasserting SLWR. Would this lead to a deadlock situation, as the FIFO is "full", and it can never empty as there isn't a complete packet yet (only 44 bytes in the FIFO, which is lesser than the 64 bytes required to complete a packet)?
2. Is setting PKTSTAT = 1 the same as {PKTSTAT=0, IN: PKTS[1:0] = 0}?
Thanks. Show Less
USB low-full-high speed peripherals
Hi, In AN4051 (Doc No. 001-15284) about the GPIF Flow State feature for UDMA, there is a strange (to me) quote on page 4 : "...
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Hi,
In AN4051 (Doc No. 001-15284) about the GPIF Flow State feature for
UDMA, there is a strange (to me) quote on page 4 :
"It should be noted that in the case where MSTB is a CTL pin, the
GPIF will produce at most one extra active edge on MSTB in response to
a not ready indication from the slave."
So am I interpreting this correctly : if the GPIF is in a flow state
and reading data from an external slave, and the slave says "no data
available", then the GPIF *might* (or might not) go ahead and read the
data anyway ?
If this is the case, how does one deal with this situation ? In my
case, I'm reading from a FIFO inside an FPGA, so I can configure it to
have an "almost empty" flag in addition to an "empty flag". It would
seem that the logic would be to pass the FX2 a signal like :
RDY0 = (almost_empty) OR (empty),
and have the flowstate use RDY0 to throttle the data. In principle
this should transfer all but the final word from the FIFO. ("almost
empty" means there is one word remaining.) That, I suppose, could be
read from the FIFO by a normal (i.e., not flow-) state of the GPIF.
Is this the right approach ?
Unfortunately, I gave it a shot and it's not quite working yet.
Before pouring too much effort into it, I'd like to know if there's an
easier way...
BTW, I am basically just using the GPIF Primer example that
writes/reads to an external FIFO. I got rid of the OUT EP and the
write, and instead pipe external video data into the FIFO in the
FPGA. For the flow state logic I use
func = (FifoFlag) OR (empty),
if (func == 0) assert RE#, clock data
if (func == 1) de-assert RE#
where "FifoFlag" is the FX2's FULL flag for the IN EP, and "empty" is
the fpga FIFO empty flag.
Thanks Show Less
In AN4051 (Doc No. 001-15284) about the GPIF Flow State feature for
UDMA, there is a strange (to me) quote on page 4 :
"It should be noted that in the case where MSTB is a CTL pin, the
GPIF will produce at most one extra active edge on MSTB in response to
a not ready indication from the slave."
So am I interpreting this correctly : if the GPIF is in a flow state
and reading data from an external slave, and the slave says "no data
available", then the GPIF *might* (or might not) go ahead and read the
data anyway ?
If this is the case, how does one deal with this situation ? In my
case, I'm reading from a FIFO inside an FPGA, so I can configure it to
have an "almost empty" flag in addition to an "empty flag". It would
seem that the logic would be to pass the FX2 a signal like :
RDY0 = (almost_empty) OR (empty),
and have the flowstate use RDY0 to throttle the data. In principle
this should transfer all but the final word from the FIFO. ("almost
empty" means there is one word remaining.) That, I suppose, could be
read from the FIFO by a normal (i.e., not flow-) state of the GPIF.
Is this the right approach ?
Unfortunately, I gave it a shot and it's not quite working yet.
Before pouring too much effort into it, I'd like to know if there's an
easier way...
BTW, I am basically just using the GPIF Primer example that
writes/reads to an external FIFO. I got rid of the OUT EP and the
write, and instead pipe external video data into the FIFO in the
FPGA. For the flow state logic I use
func = (FifoFlag) OR (empty),
if (func == 0) assert RE#, clock data
if (func == 1) de-assert RE#
where "FifoFlag" is the FX2's FULL flag for the IN EP, and "empty" is
the fpga FIFO empty flag.
Thanks Show Less
USB low-full-high speed peripherals
Hello, in our design I want to stream data in one consecutive stream into a synchronous FIFO until it's full using the GPIF with a flow...
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Hello,
in our design I want to stream data in one consecutive stream into a synchronous FIFO until it's full using the GPIF with a flowstate of
~FifoFlag (==Empty) AND RDY0
This works nicely as long as RDY0 is not 0 for several seconds at a consecutive time. If the FIFO is full for several seconds (thus RDY0 is low for some time), GPIF hangs and does not detect when RDY0 becomes 1 again. In this case the flags say the FIFO is not full, not empty and TC transaction Counter is for example 510 when it was started with 512, the DONE bit is not set, but nothing happens any more.
I've tried several ideas for workarounds, without success:
- GPIFABORT=0xff in a timer-interrupt and re-triggering GPIF
- Using the programmable FIFO flag to stop GPIF before the FIFO is really empty
- Checking the FIFO to be empty from the Host using a vendor-command before sending 512 Bytes more.
- Using the Coding-Style suggested in the FAQ with a while loop until GPIF sets DONE bit again.
Any suggestions?
Bernd
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in our design I want to stream data in one consecutive stream into a synchronous FIFO until it's full using the GPIF with a flowstate of
~FifoFlag (==Empty) AND RDY0
This works nicely as long as RDY0 is not 0 for several seconds at a consecutive time. If the FIFO is full for several seconds (thus RDY0 is low for some time), GPIF hangs and does not detect when RDY0 becomes 1 again. In this case the flags say the FIFO is not full, not empty and TC transaction Counter is for example 510 when it was started with 512, the DONE bit is not set, but nothing happens any more.
I've tried several ideas for workarounds, without success:
- GPIFABORT=0xff in a timer-interrupt and re-triggering GPIF
- Using the programmable FIFO flag to stop GPIF before the FIFO is really empty
- Checking the FIFO to be empty from the Host using a vendor-command before sending 512 Bytes more.
- Using the Coding-Style suggested in the FAQ with a while loop until GPIF sets DONE bit again.
Any suggestions?
Bernd
Show Less
USB low-full-high speed peripherals
we are having trouble making the sx2 talk to the computer using a different configuration. If anyonewas able to do this would you care to info...
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we are having trouble making the sx2 talk to the computer using a different configuration. If anyonewas able to do this would you care to inform me what you did?
Thank you,
jem Show Less
Thank you,
jem Show Less