USB low-full-high speed peripherals Forum Discussions
Hello,
how can we display fx2lp data(imge data) in the control center(or streamer) using direct x and direct show method?
anybody have done it?please let me know.
cypress has any code snipet regarding this host application?
thanks.
geetha
Show LessHi,
In the FX2LP TRM,They have given that IFCONFIG.5 (output enable) Bit must not be set to 1 when IFCONFIG.7 is equal to 0 (external clock).what whould be the reason?
regards,
geetha.
Show LessHello,
I have defined endpoint 2 in the fx2lp slavefifo code.I added descriptors in dscr.a51 file as below.
FullSpeedConfigDscr:
;; Endpoint Descriptor
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 02H ;; Endpoint number, and direction
db ET_BULK ;; Endpoint type
db 40H ;; Maximun packet size (LSB)
db 00H ;; Max packect size (MSB)
db 00H
FullSpeedConfigDscrEnd:
and also
HighSpeedConfigDscr:
;; Endpoint Descriptor
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 02H ;; Endpoint number, and direction
db ET_BULK ;; Endpoint type
db 40H ;; Maximun packet size (LSB)
db 00H ;; Max packect size (MSB)
db 00H
HighSpeedConfigDscrEnd:
and made changes in the slave.c file as below.
TD_Init()
{
EP2CFG = 0xE2; //endpoint2,IN diection
SYNCDELAY;
}
I have configured endpoint for IN bulk,But firmware Renumerates with bulk out endpoint(0x02).
what whould be the reason?did i miss anything?let me know.
thank you.
Show LessHello,
i am using c2 load eeprom booting for fx2lp in my project.defaulty i2c speed is 100khz.i have red that it can be 400khz speed by setting the EEPROM Configuration Byte.if 400khz bo bit is one,then it will be 400khz,if its is 0,its 100khz.
but how to make changes ?and where i will find this bit in the fx2lp firmware?let me know.
b7 b6 b5 b4 b3 b2 b1 b0
0 DISCON 0 0 0 0 0 400KHZ
regards,
Show LessMy apology for writing in Japanese.
Device:CY7C68013A-56PVXCT(FX2LP)
This is a continuation of my previous CDC.
https://community.cypress.com/thread/34347
■質問
上記スレッドにて、FX2LP内蔵のI2CによりFPGAはEP0を読み出す
ことが可能との情報を得ました。
I2CでEP0を読み出すためのシーケンスについて記載された資料はございますか?
■補足
テクニカルリファレンスマニュアル等を確認しておりますが、実際に
I2Cでの読み出しを実施する場合に参考となる情報を見つけることが
出来ませんでした。
I2CであればEP0を読み出せることは、資料に明記されているのでしょうか?
- EZ-USB® Technical Reference Manual
http://www.cypress.com/file/126446/download
Hi,
I am interfaced fx2lp with image sensor in slavefifo mode.sensor is in video stream mode.I have modified cypress control center to recieve the video.first i am writting the fx2lp values in the files.after this displaying video in the display in the host.control center display stops after certain time.
anyone know why this is happening?
thanks,
geethanjali.
Show LessI checked Application note, #001-58764 Rev. *I.
http://www.cypress.com/file/44471/download
My apology for writing in Japanese.
Device:CY7C68013A-56PVXCT(FX2LP)
USB CDC(Communication Device Class)の構成例として上記アプリケーションノートを参照しています。
なお、現在検討中のハードウェア構成は次の通りです。
PC - FX2LP - FPGA
■質問
FPGAに対し、Abstract Control Model Requestを通知する事は可能か。
■補足
Abstract Control ModelはCDC規格のサブクラスの一つで、仮想COM
ポートのエニュメレーションに使用するModelと認識しています。
Abstract Control Model RequestsをFPGAが取得するためにはエンド
ポイント0がFIFOバス経由で読める事が必要かと考えていますが、現状
ではそれは不可能と認識しております。
(この点は、下記の別スレッドで確認させていただきました)
https://community.cypress.com/thread/34294
何らかの方法でFPGAにAbstract Control Model Requestを通知する
手法がございましたらご教授ください。
Show LessHello,
I have interfaced image sensor to fx2lp in slavefifo mode and for this,i have modified control center to display the image in the pc side.image sensor is 752x480 resolution with 60 frames per second.what ever the image frame is displaying in the pc is shifting,that means first frame(partial) is displaying with second frame(partial) in the dispaly.
why it is happening?is it because of data loss?fx2lp and windows are not in sync?how can i solve this problem?i have attached the image display.
help me.
Show Less