Synchronizing transfers with Video frames using the Cypress FX2

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donm
Level 1
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First question asked Welcome!

Working with an existing product that utilizes the FX2 for streaming video data over USB.  The setup is as follows:

  • Endpoint 2, bulk, 512-byte packets, quad buffering, 8-bit interface
    • EP2CFG = 0xE0; // EP2 is DIR=IN, TYPE=BULK, SIZE=512, BUF=4x
    • EP2FIFOCFG = 0x08; // AUTOIN,  no zero-length packets, byte-wide interface on PortB

The video chip is continuously flowing data, even when no USB transfers are taking place.  The frames are roughly 600 x 400 bytes in size.  During the VSYNC pause, when the video chip is *not* flowing data, a small header is written to the FIFO containing some information that helps assure alignment with the video frames.

On the host pc, transfers are requested using a buffer that is larger than a single video frame.  When starting up after being idle, the first few frames are thrown away -- this synchronizes the USB requests with the video frames (meaning, the first byte of the video frame is the first byte in the buffer that was passed for the read).

The problem is that after running for an indeterminate period of time, synchronization is lost.  The host software normally receives data like so: header, image, header, image, ...  with the sizes of those transfers being consistent with expectations.  When synchronization is lost, the transfer sizes indicate fewer bytes than expected.  What can cause these "short frames"?

The procedure for writing the header packets is as follows (called from within the VSYNC interrupt service routine):

  1. INPKTEND = 0x02,  SYNCDELAY
  2. memcpy(&EP2FIFOBUF, &hdr, sizeof(hdr)), SYNCDELAY
  3. EP2BCH = 0,  SYNCDELAY
  4. EP2BCL = sizeof(hdr),  SYNCDELAY

Step 1 is needed to end the current USB transfer (the previous frame of video data).  Is there a requirement that we write INPKTEND a second time -- just after writing the header?

Also, for testing, have tried eliminating the headers altogether and just letting the video frames flow, while monitoring for "short" frames.  For this, I changed the ISR to *only* do step 1 (end the current packet).  In this mode, I sometimes get errors and sometimes do not.  If working, I always see full-sized video frames and can let it run for long periods.  But if not working, every third or fourth frame will be "short" by a few bytes, and this condition will persist for as long as it is left running.

Help is very much appreciated.

  -- donm

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1 Solution
Meghavi
Moderator
Moderator
Moderator
250 replies posted 100 solutions authored 10 likes received

Hi Donm,

FX2LP does not support UVC class that requires header and footer for each frame. The 8051 CPU is not fast enough to insert header and footer in between frames. Therefore, if you want to implement UVC class with FX2LP, an external FPGA must be used. The FPGA must insert the header and footer in between frames and pass the data to the FX2LP. Kindly refer to the following KBAs for more details:

https://community.infineon.com/t5/Knowledge-Base-Articles/Interfacing-FX2LP-with-Image-Sensor-KBA957...

https://community.infineon.com/t5/Knowledge-Base-Articles/USB2-0-Camera-Interface-Using-FX2LP-and-La... 

Regards,

Meghavi

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1 Reply
Meghavi
Moderator
Moderator
Moderator
250 replies posted 100 solutions authored 10 likes received

Hi Donm,

FX2LP does not support UVC class that requires header and footer for each frame. The 8051 CPU is not fast enough to insert header and footer in between frames. Therefore, if you want to implement UVC class with FX2LP, an external FPGA must be used. The FPGA must insert the header and footer in between frames and pass the data to the FX2LP. Kindly refer to the following KBAs for more details:

https://community.infineon.com/t5/Knowledge-Base-Articles/Interfacing-FX2LP-with-Image-Sensor-KBA957...

https://community.infineon.com/t5/Knowledge-Base-Articles/USB2-0-Camera-Interface-Using-FX2LP-and-La... 

Regards,

Meghavi

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