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Hello,
Can you please tell me the maximum delay time under input (SPI) and output (USB (FullSpeed)) conditions in CY7C65211A.
Regards,
Koichi Nishinaga.
Solved! Go to Solution.
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Hello,
Unfortunately, we do not have the data for the maximum delay time of CY7C65211A-24LTXI after receiving data from SPI and ready to output to USB.
If you provide the configurations (SPI Speed, SPI Master/Slave, USB class) , we can help you to get this data
Rashi
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Hi,
Please refer to this similar thread https://community.infineon.com/t5/USB-low-full-high-speed/CY7C65211/m-p/227427
Rashi
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Thank you for your answer.
I am sorry, but that seems a little different from the answer we want.
What we want to know is the maximum delay time inside the IC from the time the CY7Cxx starts receiving data via SPI until it is ready to transmit via USB.
Regards,
Koichi Nishinaga.
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Hello,
I am sorry, but could you please give me an answer by tomorrow (1/19)?
Regards,
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Hello,
The latency of data going into USB serial over SPI and out on USB will depend on the following factors:
- SPI Speed - Slave/Master
- USB device class - CDC/vendor
As mentioned in the earlier pointed thread, the data output on USB will be based on the host as the data will only be sent by device when the host requests it.
Rashi
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Hello,
Thank you for your answer.
I understand that it depends on the speed of the SPI and the receive behavior on the USB host side.
But, what I want to know is the maximum delay time of CY7C65211A-24LTXI between after receiving data from SPI and ready to output to USB.
Or is the CY7C65211A-24LTXI internal delay time sufficiently shorter than the IN token transmission interval of USB FullSpeed (>= 10usec), so it can be ignored?
Regards.
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Hello,
Unfortunately, we do not have the data for the maximum delay time of CY7C65211A-24LTXI after receiving data from SPI and ready to output to USB.
If you provide the configurations (SPI Speed, SPI Master/Slave, USB class) , we can help you to get this data
Rashi