Issue with FX2LP CY3689 Sync slave FIFO test

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sasha
Level 3
Level 3
10 replies posted 50 sign-ins First comment on blog

Hello,
I'm experiencing an issue with CY3689 board.
I'm simply trying to test the board in sync slave FIFO mode without master connected.
I set EP6 as IN endpoint.
I use 10K resistors to pull down/up the following signals:

FIFOADR1 - pull up (1)
FIFOADR0 - pull down (0) [those two select EP6]

SLWR - pull down (0) [activate continuous data strobing]

With that being connected before power up, and internal IFCLK free-running, I should be able to constantly read 0x00 (or 0xFF/noise - doesn't matter) from the EP6 IN FIFO through USBControlCenter?
However, it doesn't work. It "feels" like GPIOs do not work in FIFO mode, even though I set it.
When I try "Tranfer Data-IN" on EP 0x86 - I get error:
BULK IN transfer
BULK IN transfer failed with Error Code:997

(When I test Bulkloop example - it works fine).

Here's the snippet of my slave.c

void TD_Init( void )
{
IFCONFIG = 0xE3; //Internal clock, 48 MHz, Slave FIFO interface
SYNCDELAY;

EP2CFG = 0x02; // clear valid bit
SYNCDELAY;

EP6CFG = 0xE2; // in 512 bytes, 2x, bulk
SYNCDELAY;

EP4CFG = 0x02; //clear valid bit
SYNCDELAY;
EP8CFG = 0x02; //clear valid bit
SYNCDELAY;

EP6FIFOCFG = 0x0C; // AUTOIN=1, ZEROLENIN=1, WORDWIDE=0
SYNCDELAY;

PINFLAGSAB = 0x00; // FLAGC - EF
SYNCDELAY;
PINFLAGSCD = 0x00; // FLAGB - FF
SYNCDELAY;
}


void TD_Poll( void )
{
// Empty
}

Any help is appreciated, thanks!

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1 Solution
sasha
Level 3
Level 3
10 replies posted 50 sign-ins First comment on blog

Thank you for the quick response!

I found the problem.
Now, I must confess, I've been using clone of CY3689 bought on Aliexpress years ago (as logic analyzer), simply because I had it. And I learnt the lesson hard way (struggling for a week with no clue, with such a simple problem).

The clone board has wrong marking,  RDY0 and RDY1 are mixed 😞

Lesson learnt, ordered two original boards, but this one also works now. 
The good news are I  feel very confident now with FX2LP 😄 😄 

I hope it's OK to post a picture of clone if not, please delete.
Guys, buy original stuff, don't be idiots, like myself.  

DSC_8496.jpg

View solution in original post

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2 Replies
Rashi_Vatsa
Moderator
Moderator
Moderator
5 likes given 500 solutions authored 1000 replies posted

Hello,

BULK IN transfer failed with Error Code:997 is a timeout error. it will happen for EP IN when FX2LP doesn't have data to be sent to the Host.

Please let us know how is EP6AUTOINLENH/EP6AUTOINLENL set in the firmware.  EP6 FIFO becomes equal to the value specified by these registers, the packet gets auto-committed. The value specified should be less than or equal to the maximum packet size specified in the endpoint descriptor.

Kindly let me know if you are facing issues with the default AN61345 firmware or confirm if the changes done in the firmware are aligned with section 6.3 of https://www.infineon.com/dgdl/Infineon-AN61345_Designing_with_EZ-USB_FX2LP_Slave_FIFO_Interface-Appl... 

Also, please let me know the amount of data requested from the control center

Regards,
Rashi
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sasha
Level 3
Level 3
10 replies posted 50 sign-ins First comment on blog

Thank you for the quick response!

I found the problem.
Now, I must confess, I've been using clone of CY3689 bought on Aliexpress years ago (as logic analyzer), simply because I had it. And I learnt the lesson hard way (struggling for a week with no clue, with such a simple problem).

The clone board has wrong marking,  RDY0 and RDY1 are mixed 😞

Lesson learnt, ordered two original boards, but this one also works now. 
The good news are I  feel very confident now with FX2LP 😄 😄 

I hope it's OK to post a picture of clone if not, please delete.
Guys, buy original stuff, don't be idiots, like myself.  

DSC_8496.jpg

0 Likes