Good afternoon Cypress. I have a two questions:
1. In the file 38-08015 Ez-Host Cy7C67300. We are talking about the Cpu Speed register (C008) R / W. By default, this register is 0x07CF. Which means that the CPU speed is 48 Mhz / 16.
While the bits responsible for the speed are available for writing. However, when trying to write the value 0x07С0, or any other value to make the CPU speed 48 Mhz / 1.
The value of this register is not changed. Is it even possible to write data to Control Registers?
2. I was able to read the data using CyConsole. However, I noticed that the high and low bytes that we read are reversed.
And this is not an isolated case. The explanation can be seen in the screenshots.
Please provide the code snippets of below:
1. How is the CPU speed register accessed?
2. Implementation of vendor command 0xFF.