USB hosts hubs transceivers Forum Discussions
Hi support,
I am thinking of configuring the CYUSB3304-68LTXC using an external I2C EEPROM. (MODE_SEL[1:0]=2’b01)
At that time, the polarity of POWER_EN seems to be determined by the EEPROM data, so I am curious about what happens when RESETN=L.
What is the polarity of POWER_EN when RESETN=L?
Best regards,
Koki
Show LessWhat is the recommended operating range for the VBUS_DS pin of CYUSB3304-68LTXC?
BC1.2 and Apple-charging are not used in this design. In the current circuit configuration, 2.5V is applied. Is there a problem?
I think it should be connected directly to GND, but if there is no problem even if 2.5V is applied, I would like to leave it as is. This is because this design connects VBUS_DS to 2.5V.
Best Regards,
Tetsuo
I need to observe the USB 3.2 waveform transmitted from the upstream port. To do this, I would like to put the upstream port into USB compliance test mode.
Can you help me obtain information on how to place this device into compliance test mode?
Show LessHello Support,
Thank you for your usual support.
I have a question of HX3.
If the RESETN input is switched to L/H while the CYUSB3304-68LTXC is powered on, is it possible to control the POWER_EN terminal in conjunction?
For example, when the RESETN input is L, can POWER_EN=L, and when the RESETN input is H, can POWER_EN=H?
Best regards,
Koki
Show LessHello Support,
Thank you for your ususal support.
I have a question of HX3.
If the RESETN input is set to L while the CYUSB3304-68LTXC is powered on, will all USB ports on the DS side be disabled?
Also, do you know how much power it will consume in this case? (Approximate is fine)
best regards,
Koki
Show LessHi everybody,
I am currently searching for the land pattern of the reference CY7C65631-56LTXI. It is a QFN 8x8 with 56 pins. Do you have that? A document or an application note, for example?
Thank you in advance.
Show LessHello support,
Thank you for your usual support.
I have a question of CYUSB3304.
Are there any concerns about setting the RESETN input to L while the 1.2V and 3.3V systems of CYUSB3304-68LTXC are powered on? For example, are there any restrictions on the L period of the RESETN signal?
Best regards,
Koki
Show LessHello
Q1)
If they only set the MODE_SEL pin to "1.1" (without external EEPROM), will it be possible to use "internal ROM configuration" and use it according to the specifications described in "Datasheet- Table 2. 68-Pin QFN, 100-Ball BGA Pinout for CYUSB3302 and CYUSB3304"?
Q2)
Also, in the above case(MODE_SEL=1,1), is it ok to think that the internal ROM configuration settings are the same as the "default " values listed in "Datasheet Table 8. EEPROM Map"?
Best Regards
Show LessI currently have 2 DELL model computers that are same Latitude 5430 systems with Windows 10 Enterprise. I've been successful installing driver package on one machine, but on the other, the driver will not correctly install the COM port and the device I'm trying to use will not function. I've verified that both systems have Identical build level of Windows software. Any suggestions?
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HX3 has pins to connect to power switch enable pin and over-curret flag pin.
We have a question about polarity of those enabled pins and over-current.
what is polarity of enabling pin and over-current if " Pin-strap is flaoting " and mode is " Internal ROM "
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/USB%E4%B8%BB%E6%A9%9F%E9%9B%86%E7%B7%9A%E5%99%A8%E6%94%B6%E7%99%BC%E5%99%A8/HX3-polarity/td-p/681163
Show Less