Packet corruption using CY7C65632 chip in a custom Full-Speed custom HUB design

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Anonymous
Not applicable

I am working on a custom USB HUB design using 3 CY7C65632 chips and an PIC18F26j50 MCU. The architecture is one upstream HUB has its downstream ports connected as follows; 1 - to the MCU USB lines, 2, 3 - connect to two other CY7C65632 chips which provide a total of 8 downstream ports, 4 - Expansion/chain USB port.

The design is based on the reference design in CY4607 EV Board simplified for the embedded application. The functionality is operated under Linux with custom (HIDraw) device drivers for the downstream USB devices and MCU. All the downstream devices and hub chips are self powered. Schematic is attached.

The design works well if only 1 or 2 USB devices are connected to each of the downstream HUB chips. I get intermittent packet corruptions when I add a third or fourth device to any of the downstream HUB chips. The packet corruptions are primarily on the transmit side (To the device Endpoint) and are increased in frequency as the 4th downstream device is added. Moreover the packet corruptions are limited to the downstream HUB chip to which more than 2 USB devices are attached.  

I have mocked up the design using a modified commercial HUB and MCU EV Board and it works well.

I compared noise/voltages with an Oscilloscope with one downstream hub chip fully connected and the other with only two devices. All signal levels, voltages and noise levels seem identical. Unfortunately I do not have access to a USB BUS analyzer to check the actual packet information.

Any suggestion for debugging this are welcome.

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1 Solution
Sananya_14
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hello,

Upon looking at your schematic, I've added a few comments-

1. Your design seems to be self powered (Pin 37 is pulled up), but you have not added any power switch for overcurrent protection. The hub needs to have overcurrent protection of 500 mA on its downstream ports.

2. The PWR# AND OVR# pins should be pulled high with resistors of recommended value of 100K and 10K respectively. If PWR# pins are of active high polarity the ensure they are pulled low.

3. Please check if the D+/D- lines have proper series terminations and ESD protection diodes connected.

Please refer to the following application note on hardware guidelines and check if it helps.

Best Regards,

Sananya

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2 Replies
Sananya_14
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hello,

Upon looking at your schematic, I've added a few comments-

1. Your design seems to be self powered (Pin 37 is pulled up), but you have not added any power switch for overcurrent protection. The hub needs to have overcurrent protection of 500 mA on its downstream ports.

2. The PWR# AND OVR# pins should be pulled high with resistors of recommended value of 100K and 10K respectively. If PWR# pins are of active high polarity the ensure they are pulled low.

3. Please check if the D+/D- lines have proper series terminations and ESD protection diodes connected.

Please refer to the following application note on hardware guidelines and check if it helps.

Best Regards,

Sananya

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Anonymous
Not applicable

Hi Sanaya,

Thanks for your response.

This design is for an embedded system only and we know that the USB devices that will be used with it are all self powered as well.

I checked the Data sheet and it says that the OVR pins have internal pull ups. I will check the documentation for the PWR pins and try adding pull ups, but those are outputs so why should that matter?

As far as terminations on the D+/D- lines - I need to study the requirements and see if we missed anything. We did follow the reference design in terms of the layout and schematic where possible.

I will update after additional tests per your suggestions.

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