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USB hosts hubs transceivers

KePa_4784036
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Hi Cypress team,

I have a question about the CYUSB3326-88LTXC. In the datasheet, I see that 6 DS ports are available on this chip (2 USB3.0, 2 SS and 2 USB2.0). However, I'm not quite sure if the available USB2.0 are part of the available SS or if they can be used on their own. Could I get some clarifications on that?

To make it clearer, I attached a quick paint drawing of the setup I want to do. I would like to use the 2 USB3.0 DS + the 2 SS DS (not using the shared link option) as USB3 ports and I would also like to use one of the USB2.0 as an embedded connection to a MCU. There would also have a USB3.0 connection to a computer. Could you confirm me if this is possible with the chip I mentioned above?

Thank you and have a nice day,

Keven

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Ajeethkumar
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Moderator

Hi Keven,

Thanks for posting in Infineon Developer Community!

CYUSB3326 supports 6 ports only considering the Shared link ports(in this case there are 2 Shared link ports). So, it is not possible to connect a separate USB 2.0 embedded device(a fifth Downstream device) in addition to 4 USB 3.0(SS+HS) device. You can use any of the Shared link USB 3.0 ports as SS only port and use the HS data lines of that port for your USB 2.0 embedded device.

Thanks,
Ajeeth

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Ajeethkumar
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Moderator

Hi Keven,

Thanks for posting in Infineon Developer Community!

CYUSB3326 supports 6 ports only considering the Shared link ports(in this case there are 2 Shared link ports). So, it is not possible to connect a separate USB 2.0 embedded device(a fifth Downstream device) in addition to 4 USB 3.0(SS+HS) device. You can use any of the Shared link USB 3.0 ports as SS only port and use the HS data lines of that port for your USB 2.0 embedded device.

Thanks,
Ajeeth

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KePa_4784036
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First like received 10 sign-ins 5 replies posted
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Hi Ajeethkumar,

Thank you for the quick answer. That clarified the DS ports for me. When I read the number of DS ports in the datasheet it felt to me that the USB2.0 were on their own.

Now you're telling me one of the outside port could be a USB3.0 port only so I could use the HS lines for my embedded MCU. However, I read in the CY4613 datasheet on p.31 that the USB3.0 Shared Link must be connected before the board is powered on since they are expected to be embedded. Is that right? If so, it will be harder for me to handle that as an external USB3.0 port.

Thank you,

Keven

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Ajeethkumar
Moderator
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Hi Keven,

Yes, You are right. The shared link feature is meant for embedded SS devices and reusing the HS data lines with a separate Power-Switch for the USB 2.0 connector. But SS device ports need not always be embedded and they can also be removable.

In our DVK CY4613, the shared link feature is enabled in DS1 san DS2 and both SS and HS ports were external ports(Removable). I tested these ports by connecting the SS device even after power on. It is enumerated properly as similar to the SS port.

For your use case, you can simply route a pair of HS data lines from any port to your embedded HS device(Enable Shared-link feature for that port using custom configuration) and leave the HS terminals of that Port's DS connector unconnected. But, that external port can be used as an SS-only port and not a USB 3.0(SS+HS) port.

Thanks,
Ajeeth

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KePa_4784036
Level 2
First like received 10 sign-ins 5 replies posted
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Hi Ajeethkumar, 

Perfect that answer my questions. Thank you so much and have a nice day.

Keven