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When powering up HX2VL, a waveform that looks like DP is slightly pulled up is observed.
Why is this happening? Is there any problem with this behavior according to the USB standard?
Thanks,
Tetsuo
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@TeMa_2997106 -san,
I apologize for my slow response on this. I need to looking into the details of USB high speed standard to answer your question.
Here is the answer for your questions.
>Why is this happening?
The device is in indeterminate state during power up. Until the power supply reaches to device working voltage, the internal pull-up path in DP stays ON since it set to normally ON for full speed link up.
>Is there any problem with this behavior according to the USB standard?
No issue since bus reset was automatically applied in connecting process, until internal pull-up path will be ON.
Please find the following section for the detail of "Power-on and Connection Events Timing" in USB2.0 standard.
7.1.7.3 Connect and Disconnect Signaling
Figure 7-29. Power-on and Connection Events Timing
Thanks,
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Hi @TeMa_2997106 ,
Thank you for posting into our community.
Could you tell me which pin(D or DD) did you see the positive pulse at start up timing?
Also, could you tell me if you plan to use the device as bus power app no not?
There is internal 1.5k ohm pull-up resistor at DP, upstream line. It is pulled-up to 3.3V rail and ON/OFF by internal switch.
Regards,
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This waveform was observed at the DP pin (not DD pin).
Power mode is self-powered mode. Power is supplied from DCDC on the board. HX2VL is always ON when the system is ON.
Thanks,
Tetsuo
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Takashi-san,
Could you give me an update on what you are doing?
Thanks,
Tetsuo
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@TeMa_2997106 -san,
I apologize for my slow response on this. I need to looking into the details of USB high speed standard to answer your question.
Here is the answer for your questions.
>Why is this happening?
The device is in indeterminate state during power up. Until the power supply reaches to device working voltage, the internal pull-up path in DP stays ON since it set to normally ON for full speed link up.
>Is there any problem with this behavior according to the USB standard?
No issue since bus reset was automatically applied in connecting process, until internal pull-up path will be ON.
Please find the following section for the detail of "Power-on and Connection Events Timing" in USB2.0 standard.
7.1.7.3 Connect and Disconnect Signaling
Figure 7-29. Power-on and Connection Events Timing
Thanks,