USB superspeed peripherals Forum Discussions
This is regarding Cypress USB Superspeed peripheral controller FX3 (MPN: CYUSB3035).
We are already using this part in our couple of designs. In our existing designs, we connected VBUS and VBATT pin to 5V (Vbus voltage coming from USB connector).
As per datasheet of FX3 controller, VBATT pin can be connected to 3.3V battery supply.
We are planning to connect VBus with 5V (5V coming from USB connector) and VBATT pin with 3.3V on-board battery.
We would like to check if FX3 controller can operate with VBATT voltage only if voltage of VBUS pin is not available. In this case, can we use I2C interface of the controller?
Thanks & Regards,
Sunny Watts
Show LessI've wrote a bootloader based on "Fx3BootAppGcc" example. I'm running it on CYUSB3KIT-003 and using the on-board EEPROM chip. My bootloader resides at I2C 0x0 and there is another firmware image elsewhere (0x2000) in the memory (both images are verified to be correct in I2C memory using external I2C memory programmer). With proper PMODE (I2C boot) FX3 boots correctly from I2C image at 0x0. I’m connecting the OCD/GDB via the on-board serial debugger at this point. My bootloader loads the image block by block, copied by 128 bit buffer just like the "Fx3BootAppGcc" example and as described in AN76405 (EZ-USB FX3/FX3S Boot Options). Each block reads RAM target address and length, until it encounters 0 length block, then it reads the program execution start address and the checksum. My bootloader does to the checksum calculation too and it does match the one at the end of image file.
My problem is that when I try to copy the image data blocks into RAM using CyFx3BootMemCopy() I’m getting unexpected behavior. Most commonly my GDB keeps won’t do a step (it will just continue to step on a single instruction, with no loop there) after executing one step on CyFx3BootMemCopy (less commonly it will complete the copying but won’t hit another breakpoint, it will just stay in “running” state). Even when it does reach the CyFx3BootJumpToProgramEntry() it won’t boot properly (just keeps on “running”). The program that I’ trying to load to RAM is a small and simple BootLedBlink. It has just 2 sections, one targeting 0x40078000 (length 0x467) and the other one targeting 0x4007f000 (length 0x1e).
Is it possible that I’m copying into the RAM region that is occupied by currently executed instructions by MCU and that’s causing the weird behavior?
I’ve tried build both of those firmware with different i2cconf parameters passed to elf2img (0x0E, 0x0 etc), it had no effect.
The space between the bootloader and the second image (in the I2C memory) is filled with 0xFF (don’t think it matters).
Addressing the I2C pages” is not the issue, I’m fitting into first one with both bootloader and the second firmware, and the calculated checksum is identical, so the data is ok.
The other strange thing is that when I’ve build the unmodified version of “Fx3BootAppGcc” with defines for I2C boot, uploaded a LedBlink image into 0x0 I2C memory, then the “Fx3BootAppGcc” into RAM using the USB Control Center application it failed the LedBlink example too.
What could be wrong here? Is there a way to tell the elf2img to use different RAM addresses to avoid those potential conflicts? Or it’s not the issue here?
Thanks,
Matthew
Show LessI'm using CYUSB3KIT-003 test uvc with a camera sensor. But compared with CYUSB3ACC-004 Aptina Image Sensor, there is no crystal on my camera. So, I need to generate 24Mhz clock (xclk) for it.
Code is based on an75779 (FX3 uvc demo). The following is my modifiations:
uvc.c:CyFxUVCApplnInit()
/* Init the GPIO module */
gpioClock.fastClkDiv = 2;
gpioClock.slowClkDiv = 2;
gpioClock.simpleDiv = CY_U3P_GPIO_SIMPLE_DIV_BY_2;
gpioClock.clkSrc = CY_U3P_SYS_CLK;
gpioClock.halfDiv = 0;
............
apiRetStatus = CyU3PGpioSetSimpleConfig (SENSOR_RESET_GPIO, &gpioConfig);
// I add the for 24Mhz output
/* SENSOR_RESET_GPIO is the Sensor reset pin */
CyU3PGpioComplexConfig_t gpioXclkConfig;
gpioXclkConfig.outValue = CyTrue;
gpioXclkConfig.driveLowEn = CyFalse;
gpioXclkConfig.driveHighEn = CyFalse;
gpioXclkConfig.inputEn = CyFalse;
gpioXclkConfig.pinMode = CY_U3P_GPIO_MODE_PULSE_NOW;
gpioXclkConfig.intrMode = CY_U3P_GPIO_NO_INTR;
gpioXclkConfig.timerMode = CY_U3P_GPIO_TIMER_HIGH_FREQ;
gpioXclkConfig.timer = 0; // Timer initial value.
// Load the period to the maximum value so that the count is not reset.
gpioXclkConfig.period = 0xFFFFFFFF; // Timer period.
gpioXclkConfig.threshold = 0; // Timer threshold value.
apiRetStatus = CyU3PGpioSetComplexConfig (SENSOR_XCLK_GPIO, &gpioXclkConfig);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "GPIO Set Config Error, SENSOR_XCLK_GPIO, Error Code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
apiRetStatus = CyU3PGpioComplexPulseNow (SENSOR_XCLK_GPIO, 0xFFFFFFFF);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "GPIO CyU3PGpioComplexPulseNow Error, SENSOR_XCLK_GPIO, Error Code = %d\n", apiRetStatus);
CyFxAppErrorHandler (apiRetStatus);
}
#define SENSOR_XCLK_GPIO 24
Leaving all other code unchanged.
My debug uart get there outputs:
GPIO CyU3PGpioComplexPulseNow Error, SENSOR_XCLK_GPIO, Error Code = 70
I don't know for Error Code = 70 (CY_U3P_ERROR_NOT_SUPPORTED). and I can't found any examples for calling CyU3PGpioComplexPulseNow in google ( The funcation may not be for what I need).
I read cyu3gpiocomplex.c:CyU3PGpioComplexPulseNow and there are 2 lines return CY_U3P_ERROR_NOT_SUPPORTED.
Please help me how to output a 24Mhz clock.
thanks~
Show LessHello,
I have fx3s board, I want to find the length of a string between two special characters ( '$' and '#') in my program,
will u please help me how to find this ?
regards,
Ajith.
Show LessHi all,
I am working on cypress fx3. when I Flash slave fifo firmware to cypress it shows streamer example device and when I flash another example firmware it showa bulk loop example device. how to change the device name in cypress code.
Thank you.
With Best Regards,
Thrimurthi M
Show LessHello,
I am executing sample code which is provided into the FX3 SDK on the Denebola RDK. When we connect Denebola RDK with e-Cam software then its work properly but if We connect Denebola RDK with "USB Camera App" on android device ( It's have support of UVC driver ) its not working showing black screen. What is the problem?
On serial port I just found "EnterSuspendMode Status = 0x0, Wakeup reason = 0x8" this logs.
Also I am not able to find "cyu3imagesensor.c" file. Can you please provide this file or location of this file.
Thanks,
Amit
Show LessI would like to connect UART_RX (J1-19) and UART_TX (J1-21) of CYUSB3KIT-003 to another microcomputer.
However, the above signal is already connected to the USB serial conversion IC (CY7C65215).
Will be able to use UART_RX and UART_TX signals by setting the SCB0 configuration of CY7C65215 to Mode5(I2C)
and Drive Modes of GPIO_8 and GPIO_5 to TRISTATE using Cypress USB-Serial Configuration Utility ?
Show LessHello,
I'm trying to get the USB-IF certification for a device based on FX3S (CYUSB3035-BZXC) but I get some fails on the Link Layer Test (see attached report).
Three out of four fails (TD.7.9, TD.7.11, TD.7.26) are related to the "New Timers" currently used by USB-IF... Is not clear if the Legacy Timers are still allowed... I'm waiting for the lab reply... The 4th fail (TD.7.17) I don't know if it is anyway related to the same cause.
Anyway, I don't think I can fix this problems modifying my code. It seem related to the internal functioning of the controller itself... Is the FX3 platform currently USB-IF certifiable?
I'm using SDK 1.3.3. Do you think that an upgrade to SDK 1.3.4 may fix the issues?
Thanks.
Dax
Show LessHi i would lie to rest all the DMA Flag doubts that has been a bother for a while.
- For writing to Slave Fifo ie FPGA to GPIF
A current thread DMA RDY flag shows logic high or logic low (when the Buffer is Full/Not Full) ?
- For reading from Slave Fifo ie GPIF to FPGA
A current thread DMA RDY flag shows logic high or logic low (when the Buffer is Empty/NotEmpty)?
Now regarding partial flags..
- Can we use the partial flag to check the to- be- written GPIF socket( by FPGA) . If it is not asserted we can judge that there must be space to be written ..right?? is it essential that we need a DMA ready flag for starting a transfer..
"DMA_RDY" is actually a signal that is asserted when there is no DMA buffer available to satisfy the request."
Is this a valid conclusion .
utmost curiosity
Denny
Show Less