Zero-length packed during write transfer

[MaMa_4520856]

Hello,

During write transfer (Fx3 to PC), despite having full buffer (indicated by asserted DMA READY flag). After partial flag is asserted i keep writing 3 more data words, watermark value is 3 and I have 16-bit data bus. I used following formula from AN65974 app note: watermark x (32/bus width) –3.

In attachment I send firmware with GPIF project.

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

From the description, I understand that Zero Length Packet is seen on the USB side when data is transferred from FX3 to Host.

Can you please let me know which USB endpoint is used in the firmware and how much data is written to FX3 from the Master? To commit the DMA buffer to USB, the DMA buffer should be fully filled. Please check if producer event is received in the firmware when data is written to FX3 from Master

[MaMa_4520856]

Hello Rashi,

Can you please let me know which USB endpoint is used in the firmware and how much data is written to FX3 from the Master?

In write transfer I use 0x01 endpoint, and in read transfer I use 0x81 endpoint both are isochronus. I when Master is writing to FX3 it always writes full buffer (1kB).

Please check if producer event is received in the firmware when data is written to FX3 from Master

Can you pleas conform that in order to do that I need to make changes function below

void
CyFxSlFifoPtoUDmaCallback (
        CyU3PDmaChannel   *chHandle,
        CyU3PDmaCbType_t  type,
        CyU3PDmaCBInput_t *input
        )
{
    CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
    CyU3PDmaBuffer_t buf_p;

    if (type == CY_U3P_DMA_CB_PROD_EVENT)
    {
        /* This is a produce event notification to the CPU. This notification is 
         * received upon reception of every buffer. The buffer will not be sent
         * out unless it is explicitly committed. The call shall fail if there
         * is a bus reset / usb disconnect or if there is any application error. */
    	status = CyU3PDmaChannelGetBuffer(chHandle, &buf_p, CYU3P_NO_WAIT);
    	if (status == CY_U3P_SUCCESS){

    		status = CyU3PDmaChannelGetBuffer(chHandle, &buf_p, CYU3P_NO_WAIT);

			if (status != CY_U3P_SUCCESS)
			{
				CyU3PDebugPrint (4, "CyU3PDmaChannelCommitBuffer failed, Error code = %d\n", status);
			}
    	}
        /* Increment the counter. */
        glDMATxCount++;

    }
}

To be more specific do I need to call this function via dmaCfg.cb variable? Just to be clear I use Auto DMA chanell

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

Please let me know why CyU3PDmaChannelGetBuffer is being called twice in the DMA callback.

It seems that some changes are done to the firmware attached with AN65974. If yes, please share the firmware for us to check

[MaMa_4520856]

Hello,

Thank you for pointing me out that I have 2 calls of CyU3PDmaChannelGetBuffer.

In attachment I'm sending you firmware.

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

Please build the attached firmware and program FX3 with the .img file. Please share the UART debug prints when the problem is seen.

[MaMa_4520856]

Hello Rashi,

The only error I got is (Two times)CYU3P_PIB_ERR_THR3_RD_UNDERRUN CYU3P_PIB_ERR_THR3_RD_UNDERRUN, witch means that I try to read from empty buffer.

Could be that is the reason I get zero-lenght packed while trying to write? I use DMA flags (for read C as ready and D as partial), watermark is set to 3 and data bus is 16b. So delay from D flag being asserted to buffer being empty is 2 clock cycle is that right?

The project yo send me it didn't compile because buf_p and dmaBuffer weren't declared, I declared them as CyU3PDmaBuffer_t.

EDIT: I solved problem with CYU3P_PIB_ERR_THR3_RD_UNDERRUN, but I noticed that after connecting and programming both Fx3 and FPGA it tries to read right away before even I try to send data to Fx3. I have to reset FPGA(just clicking a button to set every signal to 1) before I can work as it should be working

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

Please program FX3 before configuring the FPGA. Please let me know if the problem is resolved

[MaMa_4520856]

Hello,

First I programm Fx3 then configure the FPGA. Could this be the problem that I rieceve this zlp packed to in write transfer?

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

Please let me know if ZLP is received by FX3. The debug prints added in the firmware I shared will help us know to is ZLP is received by FX3 or is the ZLP seen due to usage of Isochronous endpoint. 

Please share the UART debug prints with the firmware I shared.

[MaMa_4520856]

Helllo Rasi

here are the debug prints you asked.

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

Please confirm if the logs are captured with MANUAL macro enabled. If yes, from the UART logs, I noticed that GPIF state machine is always in state 1 and we do not see any producer event which means that the data is not received by FX3 form the FPGA Master.

If the FX3 device doesn't have data in the DMA buffer and if the host application sends the USB request for data on isochronous endpoint then ZLP will be seen on the host application.

If you are not using MANUAL mode, please capture the logs after building the attached firmware.

[MaMa_4520856]

Hello Rashi,

I didn't enable MANUAL macro, here are debug prints with firmware you attached. I didn't use MANUAL macro in this either.

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

I didn't enable MANUAL macro, here are debug prints with firmware you attached. I didn't use MANUAL macro in this either.

>> Please let me know which host application are you using for receiving the data on USB host. If you are using USB Control Center, please share the snippet and the UART prints when ZLP is sent.

Please note if the DMA buffer is empty and the USB host requests data on isochronous endpoint, ZLP will be received on the host.

[MaMa_4520856]

Hello,

Here are debugs prints with USB Control center

Please note if the DMA buffer is empty and the USB host requests data on isochronous endpoint, ZLP will be received on the host.

>> According to ChipScope analizer after I finish transfer both flags DMA_READY and Partial are asserted so buffer isn't empty (see screen below)

Flags de-asserts when I try to receive data on USB Control Center so Fx3 tries to send data to USB Host but for some reason it doesn't receive any data

Regards,

Mateusz

[Rashi_Vatsa · Accepted solution]

Hello Mateusz,

From the firmware I can see only one alternate setting is used i.e. alternate setting 0. I have modified the firmware to  start the application when the CY_U3P_USB_EVENT_SETINTF event is triggered with evdata (alternate setting). Please build the attached firmware and let me know if that works.

If it doesn't help please follow this KBA  Change Bulk endpoint to Isochronous in FX3 firmwar... - Cypress Developer Community to add two alternate settings

[MaMa_4520856]

Hello,

I tried firmware you provided but it didn't updated DMA_READY flags.

As per KBA you provided is it ok if I just download GpifToUSB firmware that is attached in this KBA and copy it EP configuration into cyfxslfifousbdscr.c file, and remove the 3rd EP which i won't use (the 0x82 - LOOP_IN ep ).

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

I tried firmware you provided but it didn't updated DMA_READY flags.

>> I couldn't get this. Please restate.

It would be good to follow the KBA and make the changes to your project. Please let me know if you face any difficulties while following the KBA

[MaMa_4520856]

Hello,

When i run the firmware you send me last time both flags A and C stays low despite the state of the buffer.

I tried to follow the KBA article and when I program the Fx3 device it doesn't show in the device tree in USB Control Center. I'll sent you firmware.

Regards,

Mateusz

[Rashi_Vatsa]

Hello Mateusz,

In the firmware shared by you, Step 3 and the following note is not followed

Note: Only USB endpoint 3 and endpoint 7 can be used as isochronous endpoints when the isoPkts field in the endpoint configuration is configured with a value more than 1.

After the modifications, the device comes up in control center. Also, note the following from the KBA:

In the firmware attached with this article, the application calls  the CyFxApplnStart () function when the CY_U3P_USB_EVENT_SETINTF event occurs. This means that the host application should select the interface with alternate setting 1. If the USB Control Center software of FX3 SDK is used, you must select alternate setting 1 manually under the device tree view