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Any additional details (or even a working example) would be helpful. Do we need to set DDR_MODE and DLE_PRESENT? Could we also DR_DATA at DDR?
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Hello,
Glad to hear that the example project was helpful
Yes, when GPIF is in DDR mode it can drive the data on both clock edges. USB to GPIF example drives the data on both clock edges. You can use the Cypress' Streamer application to check the throughput.
Rashi
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Hello,
Please find the attached example firmware which configures the GPIF in synchronous DDR mode and let me know if it works.
To configure the GPIF in DDR mode, B6 bit of GPIF_CONFIG needs to be set and along with this the dll block is enabled using the CyFxApplnSetPibDllParameters API
Rashi
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Hi Rashi,
This is helpful, thank you! Is it possible to DR_DATA as well in DDR mode? Also, is setting B6 in GPIF_CONFIG all that's necessary to get it to latch on both rising and falling edges? The docs seem to imply that it just doubles the clock speed.
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Hello,
Glad to hear that the example project was helpful
Yes, when GPIF is in DDR mode it can drive the data on both clock edges. USB to GPIF example drives the data on both clock edges. You can use the Cypress' Streamer application to check the throughput.
Rashi
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Fantastic! I'll try this out first thing next week.