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Hi,
I have a Question regarding to the pin layout of the HSMC Interconnect board. as you see on the following screenshot, there are two different pin mapping for HSMC and HSTC:
and the following image points to the HSMC Interconnect Board:
AS an Example the Cypress HSMC Interconnect board maps the PCLK to the J1-175 but on the previous image the pin 175 on HSMC PORT is N/A. It is actually maps to the HSTC PORT as the PIN 175 is HSTCA_TX_p28. as following table indicates:
FX3 PIN | HSMC | HSTC |
---|---|---|
PCLK ->175 | 175 -> N/A | 175 -> HSTCA_TX_p28 |
My question is, is the provided pin layout from Cypress is regarded to HSMC Port or HSTC Port?
Solved! Go to Solution.
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- hsmc
- interconnect
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Hello,
The CYUSB3ACC-006 HSMC Interconnect board for FX3 is for a HSMC port.
The HSMC connector used in the schematics of the design is QTH-090-04-L-D-A (coming under Messanine Connector type) which can be checked from here: QTH-090-04-L-D-A Samtec Inc. | Connectors, Interconnects | DigiKey
The schematics for the HSMC Interconnect Board can be found from the link: https://www.cypress.com/file/133876/download
In the schematics, i found that the PCLK on the FX3 side is connected to Pin 35 (PCLK) on J6 connector and PCLK on FPGA side is connected to Pin 175 on J1C connector.
This is done inorder for the interconnect board to be used between FX3 and Altera FPGA's to implement the AN65974 appnote which uses the slaveFIFO interface to implement a master-slave data transfers.
The appnote also provides respective FPGA source files for both the Altera and Xilinix FPGA boards in which the PCLK is routed to Pin 175 of the HSMC connector on the FPGA and the Interconnect board is designed to complement the slaveFIFO interface as well.
The link for the app note: https://www.cypress.com/documentation/application-notes/an65974-designing-ez-usb-fx3-slave-fifo-inte...
Hope this information helps.
Regards,
Yashwant
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Hello,
The CYUSB3ACC-006 HSMC Interconnect board for FX3 is for a HSMC port.
The HSMC connector used in the schematics of the design is QTH-090-04-L-D-A (coming under Messanine Connector type) which can be checked from here: QTH-090-04-L-D-A Samtec Inc. | Connectors, Interconnects | DigiKey
The schematics for the HSMC Interconnect Board can be found from the link: https://www.cypress.com/file/133876/download
In the schematics, i found that the PCLK on the FX3 side is connected to Pin 35 (PCLK) on J6 connector and PCLK on FPGA side is connected to Pin 175 on J1C connector.
This is done inorder for the interconnect board to be used between FX3 and Altera FPGA's to implement the AN65974 appnote which uses the slaveFIFO interface to implement a master-slave data transfers.
The appnote also provides respective FPGA source files for both the Altera and Xilinix FPGA boards in which the PCLK is routed to Pin 175 of the HSMC connector on the FPGA and the Interconnect board is designed to complement the slaveFIFO interface as well.
The link for the app note: https://www.cypress.com/documentation/application-notes/an65974-designing-ez-usb-fx3-slave-fifo-inte...
Hope this information helps.
Regards,
Yashwant
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Hello Yashwant,
Thank you for your Answer. Have a nice day.
Kind regards
Shervin