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Some reference Using FX3, what is required to use DMA fabric to link Parallel Port sockets to a CPU using MANUAL_IN... and FX3 CPU to Parallel Port Socket DMA Operation-Manual Out/In
How to connect CPU to PPort in the Master/Slave example?
In the attachment in the above references, there is a GPIF designer project too, but GPIF setting has nothing to do with who will be connected to P Port, right? So can I just use existing GPIF designer projects for Master/Slave example and only modify the DMA initialization code in the Master/Slave firmware to swith one end of some DMA channel from U port to CPU port and keep another end as before?
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Hello,
Then when and where to read/write data by CPU? In the attached project, no CPU read/write can be found, and there is no "AA" data as described in the reference
>> Apart from the modifications you mentioned in previous response, buffers (with data) needs to be sent from CPU - PPORT. This is done by CyFxBulkSrcSinkFillInBuffers API in the reference (gpiftousb) project. In this API the buffer is filled with the pattern AA using this Macro
#define CY_FX_BULKSRCSINK_PATTERN (0xAA)
after filling the buffer with AA , the buffer is comitted to P PORT / GPIF block
Please confirm that you have added this to you firmware
Regards,
Rashi
Rashi