Hello,
The I2C lines SCL and SDA should be pulled up to VCCIO with a Resistance of 2.2 K to 10K . In the datasheet, please refer to the pin descriptions of SCL and SDA.
In the CY3687 DVK a 10K pull up resistance is used on SCL and SDA.
If not used, WAKEUP pin can be pulled up to VCCIO voltage level.
On boot-up FX2LP18 checks for EEPROM at both 0x50 and 0x51 (7-bit) slave address and looks for "C2" at the address 0x00 of the EEPROM. So, for the boot to fail you need to electrically disconnect the EEPROM or change the slave address to any other than 0x50 or 0x51 or the first byte of the EEPROM should not contain "0xC2".
Please note that, FX2LP18 does not enumerate using internally stored descriptors (for example, Cypress’s VID/PID/DID is not used for enumeration) when C2 Load fails.
IFCLK is used when interfacing FX2LP18 with an external peripheral using Slave FIFO or GPIF and be used as input or output from FX2LP18.
IFCLK is necessary for synchronizing the transfers between external peripheral and FX2LP (configured as GPIF or Slave FIFO).
CLKOUT is used to clock an external peripheral continuously if required. For example, on startup, if an FPGA is connected to FX2LP18 and the FPGA needs external clock to configure itself on startup, CLKOUT from FX2LP18 can be used.
For data transfers in Slave FIFO or GPIF mode IFCLK should be used.
Thanks,
Yatheesh
