FX2LP || CY3689 DK || FLAG signals going HIGH at boot up || Issue with VLC

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abhishekps
Level 3
Level 3
25 replies posted 25 sign-ins 10 replies posted

Hi

I have observed that on boot up FlagB of FX2LP device in our application is going HIGH for sometime (approximately 288 millisecond), is that expected behavior of device?

Can we make it so that it doesn't go HIGH at boot up?

Also sometime while using our system with VLC for streaming, when we stop and start the stream again no data is visible on the display. Please suggest some of the possible issues that might have happened.

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MallikaK_22
Moderator
Moderator
Moderator
50 likes received 750 replies posted 250 solutions authored

Hi,

Apologies for the delay in my response.

Please find my comments below:

1) In fifo_reset(), 0x82, 0x84, 0x86, 0x88 should be used instead of 0x02, 0x04, 0x06 and 0x08.

2) EPxFIFOCFG=0x00 (AUTOOUT=0)

SYNCDELAY

EPxFIFOCFG=0x11     ( AUTOOUT=1)

The core needs to see AUTOOUT=0 to AUTOOUT=1 switch to arm the endpoints. Also, only OUT endpoints need to be armed.

However, in your code snippet, you are arming EP6 which is an IN endpoint that is not appropriate.

Additionally, you are not initializing EP2 in AUTO mode.

Lastly, since you are using FIFOINPOLAR, the polarity of the flags is reversed which by default are active low. So FLAG B signal is now an active-high signal. Thus, when empty during the start, it will be high. If you omit FIFOINPOLAR, the FLAG signals will be active-low by default.

Regards,

Mallika

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