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USB Low-Full-High Speed Peripherals

tayoc_1249536
New Contributor II

I am designing a circuit that uses the CY7C68013A as a USB peripheral controller.

I have a  question below.

1.  What is the minimum and maximum time from when the reset is released until the D+ pull-up is enabled?

According to "4.2 Enabling Pull-up on D+" in the PDF file at the URL below, it says "the FX2LP enables the pull-up on the D+ once the RESET is deasserted".

What is the minimum and maximum time from reset release until D+ pull-up is enabled?

https://www.cypress.com/file/142746/download

 

Regards.

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4 Replies
MallikaK_22
Moderator
Moderator

Hi,

Apologies for the delay in response.

Please check Table 5, Page 9 in the FX2LP datasheet: https://www.cypress.com/file/138911/download 

Mallika
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tayoc_1249536
New Contributor II

Hi,

Thank you for reply.

Please let me know the minimum and maximum time of the ? Part of the attached image.

Regards.

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MallikaK_22
Moderator
Moderator

Hi,

Apologies for the delay in my response.

Please refer to section 7.1.7.3, Fig 7-29 in the USB 2.0 specification.

The device should pull up the D+ line within 100ms when VBUS reaches up to 4.01V.

Regards,

Mallika

Mallika
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tayoc_1249536
New Contributor II

Hi,

Thank you for reply.

I understand that the device should pull up the D+ line within 100ms when VBUS reaches up to 4.01V.

Please let me know  the FX2LP's minimum and maximum time from FX2LP reset release until D+ pull-up is enabled?

https://www.cypress.com/file/142746/download

Regards.

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