USB EZ-PD™ Type-C Forum Discussions

I would like to program firmware onto a CCG3PA CYPD3175-24LQXQ using the SWD lines and OpenOCD.  However, I can not figure out the appropriate OpenOCD configuration file for the part.  Is there anywhere to find that?

Hi,

I'm trying to import .xlsx and .cvs files into the Protocol Analyzer.

It always says that the file has been imported successfully, but the "working bar" is running all the time and nothing shows up.

The file used has been exported to both xlsx and csv from the former anaylzer utility - neither works although this should be supported according to the release notes.

Any hints on that? What should be the correct format of the rows?

Thanks,

Domi

Hello, using an old CY4500 on a new PC, 2020-11-03:

• Download and install CY4500 software from website, dated 2020-10-09
• Plug in CY4500
• Error, drivers not installed
• Read quick start, it says to look for drivers in the install directory
• No drivers are in install directory
• No old versions of CY4500 software are available on the website

Any idea how to make this work?

Thanks

PFET Gate Drivers on VBUS Path

CCG3PA has two integrated PFET gate drivers to drive external
PFETs on the VBUS provider and consumer path. The
VBUS_P_CTRL gate driver has an active pull-up, and thus can
drive high, low or High-Z.

Q: How to implement High-Z in FW ?

Hello, I noticed that support has been added for CCG6DF to src/flash/nor/psoc4.c:

commit 1ec8dc3fb0cd5b5fc1d71470b211a1a05efc70b9
Author: Volodymyr Medvid <vmed@cypress.com>
Date:   Mon Aug 31 14:42:43 2020 +0300

    Add Cypress modifications for OpenOCD 4.1

diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c
index 48913f1d3e52..405d452cdd32 100644
--- a/src/flash/nor/psoc4.c
+++ b/src/flash/nor/psoc4.c
@@ -254,6 +254,8 @@ const struct psoc4_chip_family psoc4_families[] = {
        { 0xB5, "PSoC 4100S Plus",                      .flags = 0, .spcif_ver = spcif_v3 },
        { 0xB8, "PSoC 4100S Plus/PSoC 4500",            .flags = 0, .spcif_ver = spcif_v3 },
        { 0xBE, "PSoC 4100S Max",                       .flags = 0, .spcif_ver = spcif_v3 },
+       { 0xC0, "CCG6DF USB Type-C Port Controller",    .flags = 0, .spcif_ver = spcif_v3 },
+       { 0xC3, "CCG6SF USB Type-C Port Controller",    .flags = 0, .spcif_ver = spcif_v3 },
        { 0,    "Unknown",                              .flags = 0, .spcif_ver = spcif_unknown }
 };

I would like to program a CCG3PA part (CYPD3171-24LQXQ) using OpenOCD.  I have the MiniProg3, MiniProg4 and J-Link which I could use for the task.  I read the "CCGx (CYPDxxxx) Programming Specifications" PDF, and I am hoping that the support for CCG6DF might be able to be extended to support CCG3PA.

Hello,

We are developing a USB-A and USB-C charger around the CYPD3175. The charger will be located in area where the ambient temperature as the potential to be high by moment. In order to help the internal power electronics to stay within a limited temperature, we are planning to control the charging current available. Our USB charger only supplies 5V on USB-A and C with a limitation of 30W total. 

We can control the PD contract at runtime to reduce the current drawn from the charging device on USB-C, but it looks like for none-PD devices, the only way to reduce the current without interrupting the USB port power is to disable high current charging modes such as Apple 2.4A, QC, AFC and keep the BC1.2 active to limit at 1.5A. Is my observation is right? 

Then how can we change charge mode during runtime?

Thanks,

Patrick

Hi Cypress,

I have consulted about EMCA source code before:

https://community.cypress.com/t5/USB-EZ-PD-Type-C/How-to-get-CYPD2103-source-code/m-p/262140#M4825

But I was told that the source code was not open by local(Chinese mainland) Distributors and Cypress Application Engineer.

Is it possible to obtain a CYPD2103 templates or demo code that has removed  EMCA protocol stack?

Thanks,

Nathan

Hi,

Do you have any information on the recommended lands for QFN and TSSOP?

Best Regards,

I am attempting to change the config to the pd2122 so it will configure an android phone to be a "down facing port" but charge through the USBC connection.  I was recommended to use the CYPD2122-24LQXIT Notepad project to generate the c file to access the required config table.  This has not worked so I'm asking what I'm doing wrong.  Here is what has not worked

1. With EZ-PD Configuration Utility open the CCG2 CYPD2122-24LQXIT Notepad project and save it. 
2. This creates the notepad.c file containing the gl_config_table
3. With PSoC Creator, drill down to EZ-PD CCGx SDK->CCG2->Firmware->projects->CYPD2122-24LQXIT-notebook project
4. Copy gl_config_table data to usbpd_config.c that resides in the i2c_boot_nb project that resides in the CYPD2122-24LQXIT-notebook project
5. Build the project which creates notebook.elf, notebook.hex, i2c_boot-nb.elf, i2c_boot_nb.hex
6. Flash the chip with the notebook.hex 

The result is the phone does charge but it's a "up facing port" not a "down facing port" ?????