USB EZ-PD™ Type-C Forum Discussions
Hi,
I would like to read out checksum of CCG3PA by CLI command line, the read out value by CLI must same as the checksum value by PSoC Programmer.
I have typed command with CCG3PA, but checksum value is not meet PSoC programmer, PLS help me to review the CLI commands as following image and correct it.
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Please provide me the HX3PD's thermal Rja and Rjc values
Hello community!
I'm using CCg3pa for my custom design.
In our design CCg3pa can only act as BC1.2 and PD SNK/UFP.
We have a requirement here to read the live D+ and D- voltages ( Similar to vbus_get_value(G_PORT0); /*return present VBUS voltage in mV */ ).
As per below snippet captured from CCG3PA Data sheet I can infer that the Dp/Dm lines voltages can be accessed using available ADC. Correct me if I'm wrong.
So Can anyone please provide me insights to read Dp/Dm live voltages using an API ?
if reading live voltage is not available,
As per below snippet will reading states of Dp/Dm lines using respective structure and tracking if they're in certain range can be done ? will this structure help me achieving our requirement ?
Thanks and regards,
Pranay.
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Hi,
I want to download firmware by usb serial cable(usb to I2C). The cable use common CH341 chip. But EZ-PD Configuration Utility can not find device. The schematic is the same as Jetson AGX Xavier of Nvidia. The connection of the device is below. Please tell me what the special attention.
Thanks.
Lifeng Qin
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Hi Cypress,
We have a design that is using the CYPD5225 with TGL and a burnside bridge retimer on each port, however after the system exits S4/S5 after the first boot we cannot enumerate usb3/DP alt mode/thunderbolt unless we physically unplug/replug.
This is based on the CYPD5225-96BZXI_notebook_tbt project based on sdk 3.4.0.
After some discussion, we have a workaround of issuing a port reset command based on the system power state changes written to SYS_PWR_STATE register from the EC. (This was disabled on the project due to BC1.2 being disabled due to size requirements.
So I shortened the callback handler for this in app.c app_update_sys_pwr_state to only trigger dpm_typec_command (i, DPM_CMD_TYPEC_ERR_RECOVERY, NULL);
This fixes the issue of devices not being recognized after resume, however it will reset power to the device - which we want to avoid, as we cannot resume/hibernate etc without the device resetting.
Is there a way to trigger only re-configuring the retimer/SOC on resume?
I have noticed the following:
It seems the SDK code monitors VSYS - and will trigger retimer_set_evt(param_1,RT_EVT_VSYS_ADDED); for each retimer when VSYS is restored. However in our design the retimer is on a different supply than the CCG5225 (which is always on). So I do not think this will get triggered.
I tried to manually call this from our power state transition handler:
retimer_set_evt(TYPEC_PORT_0_IDX,RT_EVT_VSYS_ADDED); and RT_EVT_VSYS_REMOVED when we would enter/exit S0 (using the EC command handler app_update_sys_pwr_state) for each port, however this does not seem to enable the alternate modes through the retimer.
I did some additional digging and thinking, and I also wondered if the PD controller needs to notify the SOC to configure alt modes as well? perhaps through the call ridge_force_status_update or some other method?
For EZ-USB HX3PD:
1: How to setup idle mode or suspend mode for host? is it any host API to setup this USB controller idle mode or suspend mode?
2: Is it possible to switch off the power supply of DS port?
Many thanks!
Show LessHi to all,
right now I try to get the hang on the PSoC creator but I'm stuck at an issue. I use the CYPD5126-40LQXI_notebook example and as long as I use the "dummy_boot" bootloader to link all works fine. However, if I use the "i2c_boot_3_2_1_56_0_0_0_nb" bootloader (a dual application bootloader) the code generation fails once "cyelftool -M" is called to "m"erge both copies of the firmware into one hex file because both versions "overlap".
I think the root cause is the invocation of "cyelftool -B" beforehand for both copies of the firmware, both with "--flash_offset 0x00000000" which, by my guess, places both firmware copies right at the start of the flash ROM (and doesn't even account for the bootloader which should reside there).
I hope I just forgot to set an offset somewhere either in a header file or a setting but I can't find it.
Thanks for the help.
Hi Cypress
May I have latest CYPD4126 version number ? Thank !!