USB EZ-PD™ Type-C Forum Discussions
Where can I download psoc creator 4.5.x for the host sdk? The latest version online is 4.4 but the host sdk requires at least 4.5.0.7
I have looked all over the infineon website, but cannot find where to download it.
Show LessHi community ,
I am using CCg3PA in my project, is there a way to read D+ /D- line status or voltage from we as source and DUT as sink. Is there a specific function for this requirement.
thanks
Show LessHi,
Can you please share the VSEL_1_P0 and VSEL_2_P0 Pin configuration need to be used to program the regulator (Different PDO Voltages), like for example to drive 5V on Vbus, What will be the VSEL_1_P0 and VSEL_2_P0 pin configurations?
@KUOWENYUNG
Show Less
SPEC:
The CCG5 has power supply inputs at V5V_P1 and V5V_P2 pins for providing power to EMCA cables through
integrated VCONN FETs. There are two VCONN FETs in CCG5 per Type-C port to power CC1_P1/P2 and
CC2_P1/P2 pins. These FETs can provide a minimum of 1.5 W on the CC1 and CC2 pins for EMCA cable
(1). if V5V_P1 is 5V,
does it mean the Vconn Source is 1.5W / 5V = 0.3A ?
and configuaration - Vconn OCP setting is threshold = 30% , Debouce period = 1ms
does it mean Vconn OCP trigger point is 0.3A x 1.3 = 0.39A and debouce = 1ms
(1). if V5V_P1 is 3.3V ,
does it mean the Vconn Source is 1.5W / 3.3V = 0.4545A ?
and configuaration - Vconn OCP setting is threshold = 30% , Debouce period = 1ms
does it mean Vconn OCP trigger point is 0.4545A x 1.3 = 0.59A and debouce = 1ms
but SEPC :
In a notebook design, VCONN supplies power to the electronically marked cable attached to it. VCONN FETs on
CC lines can handle a current up to 0.5 A
it mean max vocnn ocp trigger point is 0.5A ??
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Hi,
I'm facing a problem while developing the firmware for a 100W power adapter.
I programmed the CYPD3196 via SWD and J-Link. Afterwards I could not program it a second time. In openocd I get the error "DP: cannot read IDR".
I suppose I have chosen the wrong bootloader. Because I was not able to find the bootloader for the CYPD3196, I utilzed the one for CYPD3175. Is it possible that this is interrelated?
Where can I find the correct bootloader files for the CYPD3196?
Is it possible to reprogram the chip?
Show LessI have questions about Configuration Parameters:
Can you please explain those Parameters in detail
1) "Dead battery" event mask
this Parameter is only useful for "dead battery" condition ? and how to use this Parameter ?
2) Rp supported and Current level
what diffetent between "Rp supported" and "Current level" ?
Both of two Parameters seems the same for setting Rp level.
3). AMD platform type - Renoir, Rembrandt_A0, Rembrandt_B0
How to know platform is Rembrandt A0 or B0?
4). For Rembrandt platform, the FW uses the one I2C Master (SCB) to inteface RETIMER and SOC, right?
Show LessHi,
Good day.
May i know where is able to download the programming guide of CCG8D/S?
Could you help to provide the programming guide for CCG8D/S series to us?
Thank you.
Jack Hsu
Show LessAs we known, we can program firmware with Miniprog,
I just want to know CCG5 CYPD5225 if can use Segger or ST Link to program hex file?
I tried Segger and STLink to programm CYPD5225 but failed.
Show LessIs it possible to log Voltage and Current values from CY4500 EZ-PD Protocol Analyzer to an excel?
Hi All,
We are developing a custom USB-PD solution using CYPD3175 & ACT4751. But we are not getting a USB to connect/disconnect events or make a call to psource_set_voltage. Thus VBUS is charged at default 5V.
We are not using VCONN, and CC/D+/D- lines are connected to CYPD3175, Attached are config files.
We would also like to know
1. How to generate a PDO table when we used the EZPD Config utility saving results in a format error.
2. How to read external ADC PIN e.g. P2.1. (there is no ADC block in components)
If required, we can share our schematic and source code through the mail