USB EZ-PD™ Type-C Forum Discussions

We use HOST SDK 3.5 for Alder platform .

As we know, the PCH communicate with CCG6DF  by I2C and CCG6DF reports type-c port connection mode status to PCH.
connection mode , Ex: USB3 , USB3 Flip , DP , DP Flip , DP + HPD...

The connection mode contains HPD status bits (I2C - Virtual HPD )

Customer don't want use "Virtual HPD",
They prefer to use GPIO to notify PCH about HPD status
How to modify FW to support "GPIO HPD"?

We are trying to configure the CYPD3120 for a display port sink/UFP application with sink pin assignment C (and DP source device pin assignment not supported) We are using the EZ-PD configuration tool but it looks like FW may be over writing the tool setting for SVID 0 bits 15:8 which set the source device pin assignment.  The CYPD3120 always seems to change this field from 0x00 (not supported) to 0x10 (pin assignment E).  Can the device be set for this type of application via the EZ-PD tool or is a FW change required?

I installed the latest Eclipse IDE for ModusToolbox™ (3.0.0) and tried to compile 2 examples from BSP PMG1-CY7112: "Helo Word" and "USBPD Sink". The first example compiled correctly, but the second one failed due to 6 errors:

'cy_stc_pdstack_port_cfg_t' has no member named 'extSnkCapSize'; did you mean 'extSnkCap'? 
'cy_stc_pdstack_port_cfg_t' has no member named 'extSrcCapSize'; did you mean 'extSrcCap'? 
initializer element is not computable at load time 
initializer element is not computable at load time 
make: *** [../mtb_shared/core-make/release-v1.9.1/make/core/main.mk:434: secondstage_build] Error 2 
make[1]: *** [../mtb_shared/core-make/release-v1.9.1/make/core/build.mk:377: C:/temp/_mtw/USBPD_Sink/build/PMG1-CY7112/Debug/USBPD_CONFIG/TARGET_PMG1-CY7112/GeneratedSource/mtbcfg_ezpd.o] Error 1 

Could you please try to compile all examples from PMG1-CY7112 BSP and let me know if they compile correctly?

Thanks,
Slava

I need the firmware for the CYPD4226 to be applied to the Nvidia Jetson carrier board, But I can't find the corresponding firmware program..

In the Jetson specification it is mentioned :"This firmware binary is released under the L4T firmware EULA"

Can you help me? Where can I download the corresponding firmware code?

What is the process to revert a CY4500 USB-C Analyzer back to its original firmware, 1.0 that supports USB-C PD 2.0?

Only the original firmware, version 1.0 is compatible and with the original EZ-PD Analyzer Utility (No "Protocol" in the title of the original Utility).

Instructions to convert a CY4500

- FROM version 1.0 for USB-C PD 2.0 supported by EZ-PD Analyzer Utility

- TO version 3.10 for USB-C  PD 3.0 supported by EZ-PD Protocol Analyzer Utility

are fairly straight forward. Is there any way to revert back to version 1.0 ?

After updating, I noticed more information is captured using the PD 3.0 compatible firmware. However, I'd like to attempt to recreate captures I'd make using the PD 2.0 compatible firmware.  Alternatively, Is there a mode with the PD 3.0 firmware version 3.10 to create a capture similar to the PD 2.0 code?

Greg

I have the CYPD4532 EZ-PD CCG3PA EVK module.

I am trying to enable VCONN to use PD/PPS 5A.

I made all the hardware settings and HEX files, but after following KBA226613, I can't program with MiniProg3 at the end.

| FAILED! PSoC device is not acquired! Check connection of the chip to the programmer
| Please, check the following items:
| - the connection between the programmer and the PSoC;
| - the correct programming protocol is selected;
| - the correct connector option is selected.

Is this manual not working because it is a CYPD3171 file??
tell me how

@RajathB_01 

Hello,

EZ-PD devices are very varied.
As a beginner I need your advice to choose a device.

Our devices are,

/ As far as possible, we do not want to use the host CPU and would prefer stand-alone operation of the EZ-PD only.

/ Sorce only (~45W).

/ Multiplexer control required due to use of superspeed.

/ USB 2.0 High Speed also required

/ No power source protocols other than USB PD are required (no BC1.2 required either).

The ACG1F series looks good, but no corresponding product can be found.
Are there any other suitable series?
Should the series for DRP be used for Source-only?

I need your help, thank you.

Best Regards,

Yukio Oyama

/ PPS is not required, but is acceptable with it.

/ Alternate mode not required.

Hello

Regarding the Quick Panel of Modus Tool Box of PMG1,
i am understanding that various parameters (PDO, etc.) can be changed using EZ-PD Configurator.
However, it is necessary to build to generate a HEX file that reflects the changed parameters.

Q)

In the development of PMG1, if the user wants to change only various configurations without buld operation,
is there a way to generate a HEX file without building for PMG1?

Best Regards

Arai

what is the reason about CCG5 port disconnect when vbus decrease to 80% vbus？

1、5V/3A, 9V/2A

2、disable UVP by call pd_internal_vbus_uvp_dis

3、test result is that：

     5V/3A： when VBUS decrease to 4V， will disable port，and trigger APP_EVT_DISCONNECT enent

      9V/2A：when VBUS decrease to 7.2V， will disable port，and trigger APP_EVT_DISCONNECT enent