USB EZ-PD™ Type-C Forum Discussions
Hi,
Our CCG3PA (CYPD3171) is setup as a power source. After negotiating a PD contract with a sink device, I can see that CCG3PA checks the VBUS voltage (input side) to make sure it is correct before turning on the external FETs for the voltage to pass the voltage to VBUS_C (output side). This is a great safety mechanism in case something wrong happens at the input side.
My question is:
What is the tolerance of the voltage check and how can it be adjusted?
In other words, if the sink device negotiated a PDO/PPS contract, what is the variance of the input voltage allowed before CCG3PA passes it over to VBUS_C (output side)?
Thanks,
Jonathan
Is there any code of CYPD4226notebook bootloadable in the two pictures? What are the differences? What's the difference between noboot, i2cboot,dummyboot, and backupfw? If I want to make a routine change, which one should I use?
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Hi, Sir,
The Customer uses CYPD5225 to implement Alder Lake platform and it doesn't have EC to interface CCG5
They plug-in type-c pen drive during system - S4 , then BB_RETIMER repsoned a I2C - NACK to CCG5.
This "NACK' causes a problem - After resume to S0, the system can't recognize this type-c pen drive.
They also test TI - PD solution, the TI - PD will retry i2c write to BB_RETEMR if BB_RETIMER repsoned a NACK.
After re-writing i2c, the BB_RETIMER will repsoned a ACK.
1. Do you have any suggestion about this problem?
2. Does FW have i2c - retry feature? how to enable it?
BR
Ivan
Show LessCurrently, cypd2122 is configured using JLINK. Programming I2C using JLINK generates a programming error (fail@Address 0x000000130 (block verification error). etc
May I ask
1.Does the cypd2122 support jink programming?
2.What is the solution to this mistake?
thank
Show LessHi,
I want ask if these three chips support Apple's fast charge protocol.
And when two USB ports are shared, the current of one USB port exceeds 100mA, and the fast charge of the other port is exits.
CCG3PA CCG3PA-NFET IP2726
Hi,
Software v1.0 works fine, but the newest version 3.1 is crashed on start. I have the screenshot of the error messages.
How can I fix it?
Thank you in advance
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I refer to SDK - CYPD3171-24LQXQ_pb project to build our power bank project.
if If the type-c is unplugged while the power role is source, the FW will throw a APP_EVT_DISCONNECT evnet.
if If the type-c is unplugged while the power role is sink, the FW won't throw a APP_EVT_DISCONNECT evnet and throw another APP_EVT_TYPEC_RP_DETACH evnet and power path mosfet don't turn off, why? and how to solve it ?
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For non-TBT host, Could you please provide me CYPD5126 reference schematic ?
Hello.
I'm using the CY4532 in Vconn mode.
Source caps (PD, PPS) are stored properly, but when connected to a mobile device, it can be charged at 0W ~ 2W level.
The board also produces noise.
For example, Galaxy Mobile displays Super Fast, but the charging watt is 0W (or 2W).
I wonder why the charging watt is low.
* Connection status
- Power : J2 24V
- SW1 : DC Input
- Power board : J6, J7 shorted 2-3 / J9, J14 shorted 1-2
- Main board : J2, J3, J4, J6 shorted 1-2 / J5, J7 open
- R1, R54 : 0ohm
Hi,all
From this Datasheet Infineon-EZ-PD_TM_PMG1-S3_Datasheet_Power_Delivery_Microcontroller_Gen1-DataSheet-v05_00-EN.pdf, the description "These chips include an Arm® Cortex®-M0/M0+ CPU and USB-C PD controller", are pd and mcu independent? I mean, if we simply want to use the pd sink or pd source function of this chip, do we need to rely on mcu to control and achieve this function? If we do not need to control the mcu to achieve this function, how do we need to achieve it?
If I have any misunderstanding, please help me to point out.
Thanks & Regards,
Jiong
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