USB EZ-PD™ Type-C Forum Discussions

I have designed the Schematic for EZ-PD™ BCR with the help of its datasheet and CY4533 BCR Evaluation Kit. I made this design according to 12V/5A fixed output and no firmware control required. datasheet was bit confusing for me so I want community's help to review my schematic and point out any issue if they find any. I would be thankful for your assistance. Also there is one additional question that this highlighted 5V_Safe line can be connected to external circuitry or its just for testing purpose. Kindly help. Thanks

Hi,

is there any setup required to get SAFE_5V PFET enabled? When connected with 5v USBC or USB A, the gate driver is 5v (PFET is OFF). 

I2C PD_STATUS bits:

UsbController.cpp: 59: onStatusTimerExpire(): VBUS voltage is 49
UsbController.cpp: 62: onStatusTimerExpire(): BCR_CFG=0x0 DATA_ROLE=0x0 POWER_ROLE=0x0 CONTRACT_STATE=0x0 SINK_TX_RDY_STATUS=0x1 POLICY_ENGINE_STATE=0x1 PD_SPEC=0x2 PARTNER PD_SPEC=0x0 UNCHUNKED=0x0

Please let me know what information I need to provide.

Regards

My hardware has a CYPD4225 IC and I have been trying to search for its firmware, but I cannot find it anywhere. I have tried the answers to the following two questions but they have also not been of any help:

https://community.infineon.com/t5/USB-EZ-PD-Type-C/CYPD4225-firmware/td-p/341445

https://community.infineon.com/t5/USB-EZ-PD-Type-C/Where-is-the-CYPD4225-firmware-source/m-p/232129

I need the hex file for 4225, where can I find it?

Hello community,

I am working with the CY4532 and the PSoC Creator. When building my software a default EZ-PD configuration gets written into the HEX-file. I know that I can alter the configuration with the EZ-PD configuration utility but I would rather alter it as part of building the software in PSoC Creator. Is this possible and how?

Thanks in advance.

In my application, I have the CYPD3171 powered from VBUS_IN_DISCHARGE. It generates 3.3V on VDDD from an internal regulator. The datasheet says not to use this to power external devices. However, I am using it for the pull up resistors for I2c communications. The datasheet says that GPIO cannot handle having a voltage on I2C lines when the CYPD3171 is powered down, so I figured pulling up to VDDD is ok since it is internally generated. Every 32 ms or so, the voltage on VDDD sags down from 3.3V to approximately 1.5V before rapidly shooting back up to 3.3V. If I increase the capacitance on  VDDD, it still sags to 1.5V but the amount of time it takes to drop from 3.3 to 1.5 increases, which seems to suggest that there is some feedback on VDDD and the voltage is allowed to drop to 1.5V on purpose. Actually, there is a voltage spike before the drop (on the EVK as well as my board with a 1 uF and 100 nF cap installed on VDDD), but the spike goes away with a 4.7 uF capacitor added to VDDD. I started a new example project (power adapter "cla" project) for the CYPD3171 and flashed it to the CY4532 EVK. I powered the EVK from VBUS_IN on J4 (J2, J3, J4 in default position, Jumper on J6 removed, J5 and J7 removed) and saw the same exact behavior on VDDD. Enabling or disabling deep sleep has no effect on this. Is there some change I need to make to the firmware to support being powered from VBUS_IN_DISCHARGE? Thanks.

Hi,

I learned about CCG3 series and DP dongle example.

But it's only can choose sink type.

I already opend the entired source code, and It can be modify for "SOURCE" type I guess.

I use psoc3.3 version and I changed some value for example,

//

#define UFP_ALT_MODE_SUPP (0u)

#define DFP_ALT_MODE_SUPP (1u)

//

finally, I want to make this adaptation board to work DP(source side) to USB type C (sink side).

When using the CY4532 EVK, I can flash the bootloader onto the CYPD3171 via SWD using the PSOC programmer utility. When I do this, and switch the jumpers etc, I can open the Configurator utility and flash the default demo firmware onto the device successfully, and this firmware works. However, when I use PSOC creator to flash the CYPD3171 example project (cla, not pb) onto the device via SWD, the firmware works when powered by the debugger, but it does not work when it is powered from the 12V DC wall wart. Also, the configurator utility (with the jumpers etc set correctly) cannot establish a PD contract with the CYPD3171 after flashing with PSOC creator. I'm assuming the Cypress bootloader on the CYPD3171 is nuked when I program it from PSOC creator. How can I configure PSOC creator to NOT nuke the cypress bootloader, and just write the main application to flash? Is it possible the issue isn't related to the bootloader? Thanks.

Where can I access PSoC Creator 3.3 to support existing CCG designs?

The PSoC Creator archive @ https://www.infineon.com/cms/en/design-support/tools/tools-archive/psoc-creator-archive/ appears to be private,

Access Denied
You don't have permission to access "http://www.infineon.com/cms/en/design-support/tools/tools-archive/psoc-creator-archive/" on this server.
Reference #18.f3d0df17.1675705772.2fb92ff0

Reference:

- PSOC Archive 3.3 corrupted CAB file 

- What is required for PSoC Creator 4.x to support CCG parts? 

Where are Technical Reference Manuals for USB-C PD controllers?

Specifically, the TRM for CCG6 is referenced on page 31 and 34 of AN210403 and identified in Community Post, Where to download CCG6 TRM (Technical Reference Manual)?

Links to CCG6 TRM in AN210403 revert to Infineon.com home page. Links in the Community Post route to an unsecure japan.cypress.com.

Greg