USB EZ-PD™ Type-C Forum Discussions

Hi,

I have a control unit that consists of a Cortex M4F, few LEDs, buttons, flash storage and LiPo battery. I also have a PCB with an accelerometer. For now, they are connected with wires and communicating through SPI. When I recharge the device (now it has micro USB for that), the sensor board may not be connected as I don't read it then. Also, during the recharging time, the data from flash (stored while running) is transferred to PC. My question is, how can I add USB Type-C to my control unit and sensor board in order to be able to communicate with the accelerometer using USB Type-C and using the same port to recharge the battery and transfer data that has been stored in the flash? I have to mention that the voltage from sensor board is 1.8V.

Regards,

Gabriel

Hi,

I am writing code to have CCG3PA send a "dpm_pd_command" request to the end device to do a DR_SWAP (data role swap). Originally I thought that the return status (ccg_status_t) will tell me if the end device accepted or rejected the request, but it seems that the ccg status will only tell me if the request is registered or not.

How to I read the response back from the end device to see if it accepted or rejected my DR_SWAP request?

Thanks,

Jonathan

I am using the CCG3 CYPD3125 with a firmware based on the notebook example on SDK v3.2.1. There is a long boot delay, about 1 second, for the bootloader to jump to the application firmware. This is causing me some problems in the way my firmware works.

I have opened the I2C bootloader project and I found that it has a wait timeout before loading the application firmware. The timeout is set by the function boot_set_wait_timeout, in boot.c. This function seems to always return a 1 second delay, from the following line, if the boot_app_id is not a special value:

gl_boot_wait_delay = GET_MAX (CCG_BL_WAIT_MAXIMUM, GET_MIN (CCG_BL_WAIT_MINUMUM, md_p->boot_app_id));

The wait delay is always CCG_BL_WAIT_MAXIMUM, therefore 1000ms. This was probably not the intention. GET_MAX and GET_MIN seems to be inverted.

I was able to bypass this line by setting the boot_app_id to CCG_FWMETA_APPID_WAIT_DEF (0xFFFF), which use the default delay of 50ms. This is done by setting the Application ID of the bootloadable component in the application firmware.

I could also set the boot_app_id value to CCG_FWMETA_APPID_WAIT_0 to eliminate the boot delay completely, but with a delay of 0, it seems to skip bootloader flash access boundaries protection.

Is this method valid to reduce the boot delay of the application firmware?

Hello,

I tried to compile SDK sample code of CYPD3125-40LQXI_notebook with Creator 4.1.

CCGx FW UserGuide described, "This version of the SDK requires PSoC Creator 3.3 DP1 (build 9674) or higher".

At first, I update all of the components used in the project to latest version.

Next, I set up the option for ARM MDK Generic.

Finally, build it.

Also, I could build the project with Creator 3.3.

Creator shows many errors below. So please let me know how I can resolve them.

1) Build error: error: lto-wrapper failed

2) Build error: The command 'arm-none-eabi-gcc.exe' failed with exit code '1'.

3) The instance 'HPI_IF', of component SCB_P4_v3_10, contains an error. Unable to locate and customize component 'SCB_P4_v3_10' used in schematic

4) The instance 'MUX_CTRL', of component SCB_P4_v3_10, contains an error. Unable to locate and customize component 'SCB_P4_v3_10' used in schematic

5) The fitter aborted due to errors, please address all errors and rebuild.

Best regards,

CYPD3126-42FNXITベースのサンプルプロジェクトが御座いましたら提供頂けませんでしょうか？

用途としましては、デバイス（CYPD3126-42FNXIT)へのFWの書込みテストを実施するのみですので

FW動作自体の確認等は行う予定は御座いません。

無い場合は、単純なFW(HEXファイル）の同デバイスへの書込み用テスト目的ですので

弊社側で作成済ですが、推奨プロジェクト等ございましたら、そちらを書込みテスト用のFWとさせて頂きたいと考えております。

宜しくお願い致します

マクニカ　荒井

I'm trying to program a CCG4 based chip using the EZ-PD Configuration Utility. Which devices are supported as the bridge in this application?

So far I've only been able to use a CY7C65215 chip to work with the "EZ-PD Configuration Utility". I've tried using several versions of a PSoC from a development board setup as a bridge without success, I've also tried using an Aardvark from TotalPhase without success.

使用CYPD3120 搭配 HS DEMUX PS8742B，來做dp dongle，板子已固定PS8742B gpio mode，在廠商提供的hex檔是可以正常輸出的，也已從可以輸出dp ok的下載好CONFIG.c ‧因為有其他需要的功能，所以要重新撰寫souce code來符合需求‧

但重新用PSOC3 所產生出來的CODE，在不考慮PS8742B  ，也將DOWNLOAD 下來的 CONFIG.c 設定檔去覆蓋，公板source code 還是dp無法輸出，

有什麼需要在注意的地方嗎?

Hi,

The default CCP3PA project (CY4532 EVK with CYPD3171 CLA implementation) uses direct feedback implementation. In the firmware, there's the following defines in config.h:

VBUS_CTRL_NONE                              (0)

VBUS_CTRL_PWM                                (1)

VBUS_CTRL_DIR_FB                            (2)

VBUS_CTRL_OPTO_FB                           (3)

VBUS_CTRL_TYPE_P1                           (VBUS_CTRL_DIR_FB)

My hardware doesn't use the CYPD3171's Feedback pin. I am using a GPIO to toggle between 2 voltage options (5V or 9V) from my external regulator. When I use VBUS_CTRL_NONE, my application doesn't work (or run) at all because it seems VBUS_CTRL_NONE is not really implemented. If I use VBUS_CTRL_DIR_FB, my 5V (default) option works, but with all the idac calculations in vbus_ctrl.c (which I think isn't necessary for my implementation), I cannot get my 9V option to work even after setting my GPIO pin. Hardware-wise, the GPIO pin did set, but my PD analyzer keep showing "hard reset" after a successful 9V negotiation over CC pin. Maybe I am missing something in the firmware. I tried commenting out some of the idac calculations code, but that didn't work.

Is it possible to implement a no feedback option?

Thanks,

Jonathan