USB EZ-PD™ Type-C Forum Discussions

Hello,

There is a difference between the signals of CC1 and CC2 in the DRP (Rp - Rd toggle) state due to the difference in FW version below.

- FW 1.0.3.516

- FW 3.2.1.1658

* VDDD of CCG3 : 3.3V

Q1) Please tell me why the waveform differs depending on FW version.

Q2) Is it possible to make the same waveform as Version 1.0.3.516 in the Config Table setting of CCG3?

Best regards,

Takahashi

The customer want to operate USB2.0 tranfer as DATA sink.So, they are going to use sample firmware of EZ-PD CCGx Power SDK(ex. CYPD3175-24LQXQ_pa_direct_fb_3_3_0_1882_0_0_0_pa.cyacd)

Q) In this case, is it possible to operate USB2.0 transfer as DATA sink without Firmware customization( Only use sample firmware)

Of cource, it is ok to customize configuration table parameters by  EZ-PD Configuration utility

Best Regards

Macnica/Arai

Hello

The customer is using psoc programmer with Miniprog3 for CYPD3126-42FNXIT. If they operate "Erase all flash", Which of  "Normal operation Firmware Image area", "Bootloader area", and "Configuration Table area" is actually erased?

Best Regards

Arai

Hi,

My project has just finished PCB layout so for now the firmware is critical. My project is based on “CCG3 C to HDMI dongle reference design“ as Lisa suggested in the previous discussions in the developer community. The picture above is the power control diagram.

The VBUS in the “CCG3 C to HDMI dongle reference design“ is a power source but in my project the VBUS is a power sink. I have the following questions:

1. is the firmware project name in EZ-PD CCGx SDK package "CYPD3120-40LQXI_dp_dongle"?

2. what functions should I add to the project for the power control? The control pins in CYPD3125 for the high-side MOSFET switch U6 are VBUS_P_CTRL0 and VBUS_P_CTRL1.

3. can I simply add the following commands before the while (1) in main() to turn on Q2&Q3 at GPIO P1.3 ?

      HV_STRL_Write(1);

      HV_CTRL_SetDriveMode(HV_CTRL_DM_STRONG);

Hello!

I have a question about DisplayPort over USB type C alternate mode.

Now we are working at the project of device that act as a video signal source and should implement only USB 2.0 link and 4-lane DisplayPort (without!!! USB 3.0) alternate mode over usb type C. I have seen UFP_D Type-C Receptacle Pin Assignments for Normal Plug Orientation & Flipped Plug Orientation (VESA DisplayPort Alternate Mode on USB Type-C Connector Standard) and I found that it is done so that there is no need for use extra mux for flipping DP-signals

My question is: could i route my 4 DP-pairs directly from DP-driver IC to type C connector without using any SS-MUX. I have brifly looked throught specification and

coudn't find any forbiddance. But i'm still worry is it correct to do it in such a way?

The three reference designs for Display Port Cable Solutions show the USB 2.0 signals (D+/-) terminating in the Cypress CCGx or Billboard controller.

Can those USB 2.0 signals be brought out along side the Display Port Signals?

CCG1 Ref: https://www.cypress.com/documentation/reference-designs/ccg1-usb-type-c-displayport-cable-solution

CCG2 Ref: https://www.cypress.com/documentation/reference-designs/ez-pd-ccg2-usb-type-c-displayport-cable-solution

CCG3 Ref: https://www.cypress.com/documentation/reference-designs/ez-pd-ccg3-usb-type-c-displayport-cable-solution

It appears, using the Hub Controller, HX3PD, both the Display port signals and the USB 2.0 signals can pass though.

Is that a special feature only available with he hub controllers and not the CCGx?

HX3PD Ref: https://www.cypress.com/products/ez-usb-hx3pd-usb-31-gen-2-hub-power-delivery

Greg

I think that it corresponds to various legacy charging (QC 4.0, Apple Charge 2.4 A, etc) as the charging function of CCG 3 PA.
Is it possible to correspond to the charge specification of this when the smartphone side is a host and communicates and charges the smartphone as well?

CCG3PAの充電機能として、各種レガシー充電（QC4.0、AppleCharge2.4A 等）に対応しているかと思いますが、

スマホ側がホストで通信+スマホ充電で、これらの充電仕様に対応することは可能でしょうか。
USB-PD機能と共用可能でしょうか。

I am using CCG3PA with PSoC Creator. I have a signal being input to pin 10 called Int_Rdy that I would like an interrupt that will trigger on both rising and falling edge of the signal. I would like to be able to read the Int_Rdy signal level from within the interrupt routine. How do I do this?

I am looking forward for a solution from Cypress which converts USB Type C Alternate mode eDP/DP to MIPI DSI.

I am working on USB hub application and referring to 'CYPD3125 Notebook solution with Dual Role functionality' example. I am looking at more detailed description for the events of app_evt_t than what is mentioned in section 6.24.4.2 in "EZ-PDTMCCGx Firmware StackAPI Reference GuideVersion 3.3.0"

Also wanted to know the order of this events.

Thanks in advance.