USB EZ-PD™ Type-C Forum Discussions
For a sink-only application using CCG3PA (CYPD3171), VBUS_IN is connected on the Type-C Receptacle side, but should VBUS_C_MON pin be connected to anything?
There are no sink-only examples in the datasheet, but the closest diagram (Figure 10, dual role power bank) in the datasheet shows VBUS_C_MON not connected.
VBUS_C_MON is either a no-connect for sink-only application or I can connect it to the sink side of the Consumer FETs. Which option is correct or either way works?
As shown in the following figure, I use scb4 as i2C.How to choose the clock parameters on the right?
Hi, infineon team.
I wanna ask something about CYPD3120-40LQXI DisplayPort example.
If we don't have a DFP sink, can we change the [example Display dongle firmware] to DRP or UFP?
This following figure that we have made adapter concepts design.
I read a DP standard 2.0 5B scenario that explane the sink device is must working DFP.
So, CYPD3120-LQXI is supported that scenario?
comment me anyone.
Thank you .Show Less
在EZ-PD™ CCGx Power SDK裡的CCG3PA範例裡可以看到HPI相關的程式
把config.h裡 #define CCG_HPI_ENABLE設為1後,重新編譯會出現錯誤
When I create a custom PMG BSP in BSP Assistant 1.0, I found that there is no generic PMG BSP which can be used as a template in BSP Assistant 1.0 such as PSOC6-GENERIC in PSoC 6 BSPs.
Do you have any plans to add this?
Thanks & Regards,
I am using CCG3PA as DRP ,
Setup: Connected 2 CCG3PA one as source and other sink,
1. From sink APDO 6 is been request 16v, min 3v3 and 3Amp
2. Source is sending Alert message (Operating condition change) followed by hard reset similar to the below issue posted
3. Is the alert expected from source ? if yes, Why there is alert from Source?
4. In which scenario Operating condition change alert bit is set ? what is the expected behavior from sink for such kind of alert message from source ?
Please find sniffer capture of the scenario from below link,
Thanks and Regards
If I use CY4500 to catch EPR 28V, will it be damaged by 28V?
How do I download the DOWNLOAD - EZ-PD™ Configuration Utility? It seems to be "locked" on the website. I have an NDA with Cypress but I'm not sure how that transfers to Infineon.
Thank you.Show Less
follow up to the issue "CYPD3120 configuration for a USB-C display port alt mode sink"
We looked at the suggestion, but I think there may be some confusion, so I want to start over with my explanation.
- When we connect the USB-C cable, we see the PD messages up until DP_Configure and the ACK.
- HPD is already high on pin 35.
- We do not see an Attention message come out after DP_Configure occurs, so the connected DP Source does not begin to link train.
- We can only get the Attention message to come out by toggling the signal on pin 35 of CYPD3120 from our host.
- Once we toggle pin 35, then the CYPD3120 sends Attention, and link training proceeds.
I do not want to toggle pin 35 from the CYPD3120, we want the Attention message to come out after DP_Configure when HPD is already high on pin 35.
As you say, I'm seeing "As soon as it configured as Display Port, the controller sent the ACK message and stay in the configured DP." but it does not send Attention to let the connected Source know the current HPD state unless we toggle HPD.
Is there somewhere specific in the code we can add to ensure that Attention always goes out with the current HPD (pin 35) state as soon as DP_Configure ACK is done?
Once this happens, everything seems to work correctly.Show Less
Our design scheme is: through CYPD4226 chip to control tusb1064 to complete the transmission of video signals from PC to FPGA. Shall we switch the working mode of CYPD4226 to UFP? We imported the CYPD4226 notebook reference project, but it doesn't seem to get the correct CC log. Does the reference project support our design? If not, what should we change?