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USB EZ-PD™ Type-C

PrRe_3492461
Level 4
50 replies posted 25 replies posted 25 sign-ins
Level 4

Hello community,

I'm using CCG3PA for my product development.It can act as only PD/QC Sink.

So to verify Qc 2.0 Sink Functionality I'm using miniprog and Bridge control utility to initiate commands over I2C and perform required actions.

I want to apply Pull-up or Pull-down on Dp/Dm lines as per QC2.0 protocol, so I've added below function in pdss_mx_hal.c and calling whenever required, also I will be calling bc_init(0); and chgb_enable(0); explicitly  before starting QC2.0 functionality :

ccg_status_t grl_chgb_apply_sink_term(uint8_t cport, grl_chgb_snk_term_t charger_term)
{
          PPDSS_REGS_T pd = gl_pdss[cport];
         switch(charger_term)
        {
          case PULL_UP_DP://0
                   pd->bch_det_0_ctrl[cport] |= PDSS_BCH_DET_0_CTRL_RDP_PU_EN;
           break;
       case PULL_UP_DM://1
                 pd->bch_det_0_ctrl[cport] |= PDSS_BCH_DET_0_CTRL_RDM_PU_EN;
          break;
         case PULL_DOWN_DP://2
               PDSS->bch_det_0_ctrl[cport] |= PDSS_BCH_DET_0_CTRL_VDP_SRC_EN;
         break;
         case PULL_DOWN_DM://3
         pd->bch_det_0_ctrl[cport] |= PDSS_BCH_DET_0_CTRL_VDM_SRC_EN;
         break;
        case REMOVE_TERMS://4
        chgb_remove_term(cport);
         break;
       case VBUS_5V://5
        /* 0.6 on D+, D- HiZ */
       PDSS->bch_det_0_ctrl[cport] |= PDSS_BCH_DET_0_CTRL_VDP_SRC_EN;
      / * Remove other terms */
       PDSS->bch_det_0_ctrl[cport] &= ~ (PDSS_BCH_DET_0_CTRL_RDP_PU_EN |
       PDSS_BCH_DET_0_CTRL_RDM_PU_EN |
       PDSS_BCH_DET_0_CTRL_VDM_SRC_EN |
        PDSS_BCH_DET_0_CTRL_IDM_SNK_EN);
         break;
}
return CCG_STAT_SUCCESS;
}

 

So I will be initiating commands over I2C from bridge control utility with

Case A: Power being 3.3v in utility,

Case B: Power being 5v in utility.

In case A with input power supply to ccg3pa IC being 3v3 when I apply Pull-up on Dp/Dm line I'm seeing only ~2.75v (in multi-meter)on Dp0(TP9)/Dm0(TP12) physical available pins on DVK because of which Connected QC2.0 provider is unable to change its voltages from one range to other range, which is unexpected.

 

In case B with input power being 5v, I'm seeing around ~4.4v on Dp0(Tp9)/Dm0(Tp12) lines because of which DUT is changing its Vbus voltage from one range to other range which is expected.

Problem statement:

-->Provider is not changing its Vbus voltage from one range to the other range as the Dp/Dm voltage ranges are out of the tolerance value of Dp/Dm line validation range by a Provider DUT to change its Vbus voltage.

Q1: Is this sequence expected as per CCG3PA design ?

Q2: If expected, Do we Anyway to make this work at 3.3v input.

 

Thanks and regards,

Pranay.

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1 Solution
PranavaYN
Moderator
Moderator 50 likes received First comment on KBA First question asked
Moderator

Hello Pranay!

This should not be the case. When you apply termination it should be pulled up to appropriate voltage without any drop.

Can you try disabling all other terminations using ccg_status_t chgb_remove_term(uint8_t cport) before applying the termination required and check if the behavior changes?

 

Best regards,
Pranava

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6 Replies
PranavaYN
Moderator
Moderator 50 likes received First comment on KBA First question asked
Moderator

Hello Pranay!

This should not be the case. When you apply termination it should be pulled up to appropriate voltage without any drop.

Can you try disabling all other terminations using ccg_status_t chgb_remove_term(uint8_t cport) before applying the termination required and check if the behavior changes?

 

Best regards,
Pranava
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PrRe_3492461
Level 4
50 replies posted 25 replies posted 25 sign-ins
Level 4

Hi Pranava,

Thanks for the reply,

I tried that already , After chgb_remove_term(0) the Dp/Dm voltages remains as 2.7V if we apply 3v3.

I see that there is a field "CMP1_VREF_SEL : Reference voltage select bits "  in USBPD_BCH_DET_0_CTRL0  register with address 0x400A0700, Do you think that changing this value would help us ?

Kindly Try to reproduce on your end as well so that it will be easy for us to be in sync.

 

Thanks and regards,

Pranay.

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PrRe_3492461
Level 4
50 replies posted 25 replies posted 25 sign-ins
Level 4

Hi Pranava,

We're waiting for your reply. can you please let us know your inputs.

 

Thanks and regards,

Pranay.

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PrRe_3492461
Level 4
50 replies posted 25 replies posted 25 sign-ins
Level 4

Hi Pranava,

I tried changing "CMP1_VREF_SEL : Reference voltage select bits "  in USBPD_BCH_DET_0_CTRL0  register but that didn't help us getting DpDm voltages in required range.

Regards,

Pranay.

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PranavaYN
Moderator
Moderator 50 likes received First comment on KBA First question asked
Moderator

Hi Pranay,

I tested the terminations on the CCG3PA EVK. For VDDD on 3.3V, I see above 3V on Dp/Dm when pulled up. The same is above 4.7V when powered with 5V. I could not reproduce this issue. Please check once at your end if you are applying the terminations the right way.

Best regards,
Pranava
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PrRe_3492461
Level 4
50 replies posted 25 replies posted 25 sign-ins
Level 4

Hi Pranava,

I got occupied with something else, so getting hard time to implement and test this feature.

I will get back to you when i restart this. Until then can we keep this on Hold or something like that.

 

--pranay

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