PMG1-S1 power connection in PD DR Source mode

Announcements

Live Webinar: USB-C adoption. Simple & Cost-efficient solutions | April 18th @9am or 5pm CEST. Register now !

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
JPS
Level 1
Level 1
5 questions asked 10 sign-ins 5 replies posted

Discussion started in case 0668800. 

We unsuccessfully try to modify a board CY7111 to run it as a USB PD Source (i.e.: charging a phone).

The PMG1-S1 seems to go to a latch up mode (2.5V on all I/O) when VSYS (3.3V in our case) is first applied.

At contrary if VBUS is applied first, the PMG1-S1 is starting properly.

Also here are the main questions:

1) How to power VSYS from the local PSU that could be present before any phone is attached to VBUS?

2) If we use an enable pin on VSYS power what is the minimum delay needed between VBUS valid and VSYS activated?

3) Does the XRES pull up need to be tied to VSYS or VBUS (we want to be able to use CC remote flash programming when available)?

Thank you.

0 Likes
1 Solution
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

Firstly, We currently do not have source code to support DRP/ Source mode of PMG1. It is yet to be released. Also, CY7111 kit is meant to be PD sink and not PD source.

If you want to design PD source, please follow this application diagram.

PranavaYN_0-1640068100929.png

To answer your questions,

1. Refer to the above application diagram.

2. Can you please explain this question a bit more. I did not understand this.

3. CC programming doesn't require XRES pin. You can tie it to VDDD instead of VBUS or VSYS as done in the application diagram.

Best regards,
Pranava

View solution in original post

0 Likes
9 Replies
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

Firstly, We currently do not have source code to support DRP/ Source mode of PMG1. It is yet to be released. Also, CY7111 kit is meant to be PD sink and not PD source.

If you want to design PD source, please follow this application diagram.

PranavaYN_0-1640068100929.png

To answer your questions,

1. Refer to the above application diagram.

2. Can you please explain this question a bit more. I did not understand this.

3. CC programming doesn't require XRES pin. You can tie it to VDDD instead of VBUS or VSYS as done in the application diagram.

Best regards,
Pranava
0 Likes
lock attach
Attachments are accessible only for community members.
JPS
Level 1
Level 1
5 questions asked 10 sign-ins 5 replies posted

Hey Pranava,

 

I have already sent the schematic of the CY7111 board in the case 0668800.
Please reed the Q/A already existing at the end of this case.

The CY7111 board has been modified to behave as a USB PD Power Source.

The problem is not a software issue (the flash of the PMG1-S1 has been erased) but an hardware issue as the PMG1-S1 goes to latch up with 2.5V present on all I/O.

The power supply scheme follows the one specified in the data sheet with an independent 3.3V that is powered by the local power supply (5V).

Could you investigate what is going on when the local power supply power VSYS is present before VBUS?

According to the data sheet it is supposed to be 2 independent power supplies.  

Thanks.

0 Likes
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hey,

 

I did some testing at my end on CY7111 kit and here is my findings,

1. I programming the kit with "Hello World" code example.

2. I disconnected all power supplies to the board.

3. Removed the jumper connected to J5 (Power selection jumper). All 3 terminals are left unconnected.

4. Connected the Kitprog side Type-C Connector to establish serial terminal connection and added necessary UART connections.

5. Powered the chip with VSYS,  VSYS pin on the J7 is unconnected to chip VSYS, you should add a diode D6 as present in schematic.

PranavaYN_0-1640242209418.png

 

6. After doing this, I am able to successfully print "Hello World" in the terminal, the VDDD voltage reads 3.3V as expected.

I tried both combinations, connecting VBus first followed by VSYS and vice versa and do not find any issue.

Can you try the same step and let me know if you are able to successfully see the terminal prints?

 

Best regards,
Pranava
0 Likes
JPS
Level 1
Level 1
5 questions asked 10 sign-ins 5 replies posted

Hi Pranava,

From your explanation I see several points that differ from the evaluation board that I tested:

1) You did not place any jumper in J5 to power VCC_IN.
As VCC_IN is the  VBUS pin from the PMG1-S1 this is in practice an un-useful setting as the PMG1-S1 needs to monitor and discharge the USB-C VBUS in a USB-PD source scheme (fig 9 PMG1-S1 datasheet).

2) You populated D6.
My guess is that D6 is present to avoid any reverse current from the internal power supply of the PMG1-S1 to the local 3.3V.

Is VSYS_IN connected to a 3.3V power supply?
I did not used D6 to protect the 3.3V against any reverse current on the modified evaluation board.
But our board that is going to manufacturing has a reverse current protection on the 3.3V regulator.
It should be fine.

For now I will go back to my office only in January and then I will make the test with D6 populated.
In the mean time could you make the test connecting J5 jumper pin1-pin2 and see if the PMG1-S1 is still functional?

Thank you for your help.

0 Likes
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

Sorry for delay in responding.

I tried with Jumper J5 placed at 1--2 location as you have explained. S1 is still functional and I do not see any issues. Is this behavior verified on multiple kits?

Best regards,
Pranava
0 Likes
lock attach
Attachments are accessible only for community members.
JPS
Level 1
Level 1
5 questions asked 10 sign-ins 5 replies posted

Hi Pranava.

I will make some more tests when I will be back to the Office.
Only one of our kits is modified.
My modified kit is not working when only VSYS is powered (3.3V) but not VBUS.
I am seeing 2 potential differences:

1) My modified board does not have any diode for protection against reverse current through U3.
2) On the modified board U3 IN (Pin 1) is connected to VBUS_MON (J9-1) with R26 removed (attached schematic).

When only VSYS is present the 1) should not be changing anything.
Do you have the 2) modification on your test board?
Could the removal of R26 have a side effect due to the evaluation board layout?
Do we need to put back R26?

When I will go back to the office I will check again the modified board for any connection error.
Thank you.

0 Likes
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

I can not make the modification that you have explained at my end. Once you return to office please check the following,

1. With the modified board, when J9 is provided with 5V supply, measure the output voltage of LDO U3. The LDO is rated for 400mA. 

2. Populate either D6 or 0 ohm resistor at R19 to connect VSYS_IN to VSYS. Then provide 3.3V to VSYS_IN J7-17 and check if VDDD(7-1) has 3.3V. 

3. Also measure VDDIO voltage.

These values will help us isolate the issue. Please test at your end and let me know.

Best regards,
Pranava
0 Likes
JPS
Level 1
Level 1
5 questions asked 10 sign-ins 5 replies posted

Hi Pranava,

The issue with the evaluation board was that the PMG1-S1 VSYS pin was not connected.
Thus connecting VSYS to VSYS_IN (J7-18) with VSYS_IN connected to 3.3V is working well.
An external power supply provides 5V (J9) to the input of the on board 3.3V LDO.
Now the evaluation board is only running (Hello World software example) only when the 5V is provided.

On board voltage:
3.3V --> 3.34V
VDDD --> 3.31V
VDDIO-->3.31V

Do you know when an example of USB PD DR will be release for the CY7111 evaluation board?
A beta version would be sufficient for our tests.

Thank you for your help.

0 Likes
Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

The DRP example is currently released for PMG1-S3 (https://github.com/Infineon/mtb-example-pmg1-usbpd-drp). For S1 based example you have to contact Cypress Sales and Marketing team - https://www.infineon.com/cms/en/about-infineon/company/find-a-location/?utm_source=cypress&utm_mediu...

Best regards,
Pranava
0 Likes