On the CYPD3125 how do I maintain consumer path power when dropping VSYS?

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MaKe_4459911
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We have the CYPD3125 setup as a DRP.  We supply Vsys (3.3V) to the 3125 when our product is turned on.  When we turn off we still want power supplied to the product for charging the battery.  When we're sinking 5V from the USBC connector (from a USB2.0 connector) and we turn off our product so that VSYS goes away, we see Vddd droop until it switches over to VBUS and then it returns to 3.3V.  But before it switches over it turns off the consumer path FETs so that we lose power to our battery charger.  Here's the trace:

pastedImage_2.png

You can see Vddd droop with Vsys until it switches over to the internally regulated Vbus.

Is there a way to keep the consumer path (Switched VBUS) from shutting down?

After a few 100ms we will sometimes see the consumer path turn back on but often the CYPD3125 doesn't seem to be executing code (we have a flashing LED indicating that software is running on the 3125).

Thanks,
Mark

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1 Solution

Hi Mark,

CCG3 SDK have a function called vsys_is_present in the pdss_hal.c file which can be used by the customer to detect when VSYS gets removed. This is not interrupt based and has to be called periodically. You can use any desired voltage level, with the default being 3.2 V.

Once vsys falls below this level (the function returns false), do the following to turn on the LDO and turn-off the VSYS switch.

        tmp = pd->vreg_vsys_ctrl;

        tmp |= PDSS_VREG_VSYS_CTRL_VREG20_EN;

        tmp &= ~(PDSS_VREG_VSYS_CTRL_ENABLE_VDDD_SWITCH |DSS_VREG_VSYS_CTRL_VREG20_ONOFF_CNTR_MASK);

        pd->vreg_vsys_ctrl = tmp;

Best Regards,

Lisa

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ShifangZ_26
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Hi Mark,

May I know which firmware version you are testing? Is it latest host SDK3.4 (https://www.cypress.com/documentation/software-and-drivers/ez-pd-host-software-development-kit  )?

CCG3 firmware pre-write select logic in firmware example code:

1. VSYS is first priority power source of CCG3.

2. If VSYS is not available,  the internal 20V regulator (on VBUS) will be enabled and VDDD switch will be switched to output of regulator.

3. If VSYS power is resume back, the internal 20V regulator (on VBUS) will be disabled and VDDD switch will be switched to VSYS.

As per the requirements of your description, the most important point to overcome the issue is: keep VDDD voltage higher than 2.75V.

So that, I could like to recommend:

1. Use VBUS power source to power CCG3 and do not switch if you can assure the VBUS will always existing.

2. Or use a larger Cap on VDDD (but the time from VSYS to VBUS on your case is a bit long.) for VDDD stand on above 2.75V.

Best Regards,

Lisa

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Hi Lisa,

I started with CYPD3125-40LQXI_notebook.cywrk version 3.3.1.

The latest host SDK3.4 version’s release notes indicate that there is nothing new for my CCG3 product.

Do I have software control over the switching between VSYS and VBUS to supply VDDD?

Thanks,

Mark

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Hi Lisa,

Another question: Is the internal switch that connects VSYS to VDDD bidirectional so that VDDD is forced to follow VSYS as VSYS decays? If that is the case then no amount of capacitance will keep VDDD from drooping.

Mark

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Hi Mark,

CCG3 SDK have a function called vsys_is_present in the pdss_hal.c file which can be used by the customer to detect when VSYS gets removed. This is not interrupt based and has to be called periodically. You can use any desired voltage level, with the default being 3.2 V.

Once vsys falls below this level (the function returns false), do the following to turn on the LDO and turn-off the VSYS switch.

        tmp = pd->vreg_vsys_ctrl;

        tmp |= PDSS_VREG_VSYS_CTRL_VREG20_EN;

        tmp &= ~(PDSS_VREG_VSYS_CTRL_ENABLE_VDDD_SWITCH |DSS_VREG_VSYS_CTRL_VREG20_ONOFF_CNTR_MASK);

        pd->vreg_vsys_ctrl = tmp;

Best Regards,

Lisa

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Hi Mark,

Additional updates/information:

When VSYS is dropping, CCG3 firmware is looking for hard reset from CCG3 and re-boot the device. CCG3 will be powered by VBUS directly.

Best Regards,

Lisa

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