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for calculation output value of ADC and calculating the input divider I have to know the value of the internal reference voltage. Would be great to have this information in the description of the cyhal method.
So what is the internal reference when calling the adc init as described in the documentation...
const cyhal_adc_channel_config_t channel_config ={ .enable_averaging = false, .min_acquisition_ns = 220, .enabled = true };
thanks rgl
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Hi rgl,
There are 2 ADCs present in PMG1-S3. It is recommended to use the PDL library to use these ADCs.
8 bit ADC has the option to select Vref between internal bandgap (2.0V) or from external VDDD.
12 bit ADC can also have configurable Vref. Please refer to the basic code example of both 8-bit and 12-bit ADCs here,
https://github.com/Infineon/mtb-example-pmg1-12-bit-saradc-basic
https://github.com/Infineon/mtb-example-pmg1-8-bit-saradc-basic
Readme provides elaborate information regarding the configurable parameters of these ADCs.
Please let me know if you need any further information regarding this.
Pranava
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Hi rgl,
There are 2 ADCs present in PMG1-S3. It is recommended to use the PDL library to use these ADCs.
8 bit ADC has the option to select Vref between internal bandgap (2.0V) or from external VDDD.
12 bit ADC can also have configurable Vref. Please refer to the basic code example of both 8-bit and 12-bit ADCs here,
https://github.com/Infineon/mtb-example-pmg1-12-bit-saradc-basic
https://github.com/Infineon/mtb-example-pmg1-8-bit-saradc-basic
Readme provides elaborate information regarding the configurable parameters of these ADCs.
Please let me know if you need any further information regarding this.
Pranava