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The DataSheet for the CCG4 says there are 4 ADCs (Figure 2), but each ADC can only connect to 2 global analog multiplex busses.
Does this mean only 2 of the ADCs are useful?
Or, are there really 4 global analog multiplex busses on the CCG4? If so, how do I specify which USB-PD subsystem a GPIO pin should connect to?
I'm looking at the notebook example firmware. Both VBUS_MON_P1 and VBUS_MON_P2 are connected to AMUXA. I don't understand why this isn't a conflict.
Solved! Go to Solution.
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Hi,
I'm sorrt my former reply was incorrect. Each port has two AMUX(AMUXA and AMUXB). Which means CCG4 has totally 4 AMUX. However, each port can only access two of them.
Regards,
Eddie
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Hi,
Each USB-PD sub-system of CCG4 contains two 8-bit SAR ADCs. Figure 2 is for CCG4 that have two Type-C Ports. There are some types of CCG4 only have one Type-C port.
There are only two globa AMUX. When doing voltage measurement, AMUX will switch to the right Pin with High-speed I/O matrix(HSIOM).
Regards,
Eddie
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I'm using the CYPD4225, which has two ports.
I'm still confused how the right pin is selected. Both VBUS_MON_P1(pin 13) and VBUS_MON_P2(pin 25) are selected to HSIOM_MODE_AMUXA in system_init().
Then, in vbus_is_present() the voltage is sampled by calling pd_adc_comparator_sample() with PD_ADC_INPUT_AMUX_A for the input. At this point, both pins have been connected to AMUXA and nothing seems to indicate which one should be sampled. How does this work?
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Hi,
I'm sorrt my former reply was incorrect. Each port has two AMUX(AMUXA and AMUXB). Which means CCG4 has totally 4 AMUX. However, each port can only access two of them.
Regards,
Eddie