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Jul 27, 2022
09:11 AM
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Jul 27, 2022
09:11 AM
Using CCG5 as the sink end, The Apple 20W or other 65W PA charge for ccg5, a hard reset occurs when PA plugin, PD LOG has been posted.
Please help to analyze the reason.
Solved! Go to Solution.
Labels
- Labels:
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USB EZ-PD Type-C
- Tags:
- ccg5
- hard reset
- pa
1 Solution
Jul 27, 2022
08:11 PM
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Jul 27, 2022
08:11 PM
Hello Kok,
Typically, Hard reset was issued before sink send request without obvious current sink with below reason:
- Sink have not get VBUS was powered 5V and vRd is effective. The max timeout is 275ms (refer tVBUSON in Type-C specification.). Sink will send Hard Reset.
- In SPR Mode when a Sink observes an absence of Source_Capabilities Messages, after VBUS is present, for a duration of tTypeCSinkWaitCap (max: 620ms) the Sink Shall issue Hard Reset Signaling in order to restart the sending of Source_Capabilities Messages by the Source. Sink will send Hard Reset.
- If Source have sent Source Capabilities than 50 times, but sink have not acked with GOODCRC. Source will send Hard Reset.
Best Regards,
Lisa
2 Replies
Jul 27, 2022
08:11 PM
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Jul 27, 2022
08:11 PM
Hello Kok,
Typically, Hard reset was issued before sink send request without obvious current sink with below reason:
- Sink have not get VBUS was powered 5V and vRd is effective. The max timeout is 275ms (refer tVBUSON in Type-C specification.). Sink will send Hard Reset.
- In SPR Mode when a Sink observes an absence of Source_Capabilities Messages, after VBUS is present, for a duration of tTypeCSinkWaitCap (max: 620ms) the Sink Shall issue Hard Reset Signaling in order to restart the sending of Source_Capabilities Messages by the Source. Sink will send Hard Reset.
- If Source have sent Source Capabilities than 50 times, but sink have not acked with GOODCRC. Source will send Hard Reset.
Best Regards,
Lisa
Jul 28, 2022
06:45 PM
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Jul 28, 2022
06:45 PM
Hi Lisa,
Thank you for your reply, It seems like the sink is delay when response the source capability, I'll modify the code to verify.
Thank you!