CYPD5225: I2C decoding

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td83
Level 1
Level 1
10 questions asked 10 sign-ins 5 replies posted

Hi,

We are using a Tigerlake SOC with a CYPD5225 power delivery.

I have checked the I2C bus between the Tigerlake and the CYPD5225, there is I2C access from the Tigerlake but none of them are acknowledge by the CYPD5225.

The I2C cycles from the Tigerlake (address 7 bit 0x51) are not acknowledged buy the CYPD5225.

To set the slave I2C address in the CYPD2552 I set the parameter "SOC I2C address (0x)" to 0x51.

Is it right ?

As pin L6 and K6 are double function pins I2C_SCB2 or GPIO, how can I check I have the right configuration for these pins ?

The template used is the file CYPD5225-96BZXI_notebook_3_4_0_2559_0_0_0_nb.hex from Cypress tool

Is there a delay between CYPD5225 power up and the first I2C cycle that the CYPD5225 is able to acknowledge ?

Thank you for help,

Best regards,

TD83

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Pranava_YN
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi,

Sorry for the confusion!

CYPD5225 I2C connected to the TBT SoC is configured as I2C Master. The slave address set in Configuration Utility as you have described in your first post is used to access the TBT SoC I2C Slave port. Please make sure you set correct I2C slave address corresponding to the Port. 

You can set I2C addresses to each port in EZ-PD Configuration Utility ICL/TGL Configuration under each port.

Regarding power mode of CCG5, There are no external signals as such to determine the power mode. Switching between the Power modes is done automatically in the firmware. Why do you want to know the current state?

Best regards,
Pranava

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