CYPD4126-40LQXIT, VSEL_1_P0 and VSEL_2_P0 pin configurations for different PDO voltages

[Harshitha]

Hi,

Can you please share the VSEL_1_P0 and VSEL_2_P0 Pin configuration need to be used to program the regulator (Different PDO Voltages), like for example to drive 5V on Vbus, What will be the VSEL_1_P0  and VSEL_2_P0  pin configurations?

@KUOWENYUNG

[Wang_Fred]

Hello KUOWENYUNG,

Please refer to the configurations set for CY4541 EVK and CCGx Host SDK project -

Thanks,

Fred

[Harshitha]

Hello,

Thank you for your response.

In CYPD4126-40LQXIT USB PD Controller, Pin number 19(VCONN_MON_P0/P2.4) mentioned that it Monitor VCONN for UVP condition on port, It will look for UVP detection on VCONN which is 5V .

If it is Under voltage what the device will do and which GPIO will it use to raise Under voltage flag?

[Wang_Fred · Accepted solution]

Hello,

Sorry for late reply. The VCONN_MON pin is just a GPIO and you need to implement the voltage monitoring manually in FW. On other hand, you need to connect this pin to VCONN line through resistor divider in your HW design.

For the HW design, you can refer to CY4541, and refer to API e.g. pb_get_battery_voltage() in CCG3PA power SDK for how to implement a external voltage monitor through a GPIO.

Thanks，

Fred