CYPD3175-24LQXQ_pa_direct_fb do not work on customized hardware

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NiBi_1639801
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Hi all,

I currently  build USB 18W mobile Power Adapter, which is based on the cypress CYPD3175-24LQXQ microcontroller and the InnoSwitch3-CP from Power integration.

The hardware part is nearly similar to your example hardware for the CCG3PA 27W Mobile Power Adapter Board (https://www.cypress.com/documentation/reference-designs/ez-pd-ccg3pa-usb-c-mobile-power-adapter-solu...) . The only different is that I do not need the P2.2 (Pin 12), because I only want to support fix power levels of 5V/3A and 9V/2A (please see the attached picture for the hardware).  Therefore I don’t want to generate voltage below 5V.

For the software part I use the “CYPD3175-24LQXQ_pa_direct_fb” project as starting point. I modify the software via the EZ-PD Configuration  tool and use the generate c.file to override the config-file in the project. Furthermore we used the PSoC Creator 4.2 to deactivate the Load_En and generate a new firmware hex.-File. We used this hex.-File (Datapath: CYPD31754LQXQ_pa_direct_fb01.cydsn\CortexM0\ARM_GCC_541\Debug\....hex) to flashed it to our target hardware via the PoC Porgrammer 3.28.3 Software and the MiniProg3 to flasher. After the flash process I get the successful message. The internal regulator works fine I can measure a voltage of 1.6V on Pin VDDD and 3.3V on VCCC.

But the output voltage just works with 4.4V and if I connected an external sink (mobile phone) the current is limit to 70mA. If I connect an electronical sink the voltage show the same behaviour.

If the customized hardware is programmed with the bootloader (without firma/application software) the voltage works on a stabile voltage range of 5V and the current is limit to 500mA for every connected mobile phone.

Furthermore, we flashed the normal “CYPD3175-24LQXQ_pa_direct_fb” hex.file to the our hardware unfortunately it caused the same behaviour like the modify firma software.

I am not sure why the software does not work. It is based on the fact, that I don’t  use the Pin P2.2? Besides could you please explain me, why we need the PIN 2.1. I cannot see that the Pin was activated in the Application Software (in PSoC Creator 4.2).

Do you have any explanations for this the strength behaviour?  If you need I can sent you the circuit diagram as well as the software.

I am looking forward to your answer!

Best,

Nik

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ShifangZ_26
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10 likes given 250 sign-ins 1000 replies posted

Hi Nik,

1. Could you please kindly share below waveform of "4.4V" case you have been mentioned above?

a. VBUS

b. FB

c. CC1

d. CC2

2. May I know whether you have been cached the CC log of the "4.4V" case?

3. Could you please kindly confirm the Resistance value of R11 and R13?

5. Your question about PIN 2.1, the answer is,

a. PIN2.1 is renamed Load_En in PSoC Creator 4.2. If you Search in the project with "Load_En", you will get some defines and functions.

b. PIN2.1 is for pre-load which is aim to turn on/off the load switch. But this is only need for lower than 5V. This settings is only needed for PI board.

Best Regards,

Lisa

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ShifangZ_26
Moderator
Moderator
Moderator
10 likes given 250 sign-ins 1000 replies posted

Hi Nik,

1. Could you please kindly share below waveform of "4.4V" case you have been mentioned above?

a. VBUS

b. FB

c. CC1

d. CC2

2. May I know whether you have been cached the CC log of the "4.4V" case?

3. Could you please kindly confirm the Resistance value of R11 and R13?

5. Your question about PIN 2.1, the answer is,

a. PIN2.1 is renamed Load_En in PSoC Creator 4.2. If you Search in the project with "Load_En", you will get some defines and functions.

b. PIN2.1 is for pre-load which is aim to turn on/off the load switch. But this is only need for lower than 5V. This settings is only needed for PI board.

Best Regards,

Lisa

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Hi Lisa,

thanks you for the reply.

1. Attached you can find the voltage waveforms of VBUS, FB, CC1 and CC2.

2. Could you please explain me in detail which information do you need? Thanks!

3.The Resistances are placed in the hardware and have the following size R11is 68k and R13 is 200k.

5. According to your answer: Is it sufficient to disable the  PIN2.1 in the config.h file?  (#define APP_VBUS_LOAD_SWITCH_ENABLE  (0)) Or do I have to take any further action? (Note: After define “APP_VBUS_LOAD_SWITCH_ENABLE 0” I am able to build the software).

I am looking forward to your answer!

Best

Nik

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Hi Nik,

1. The wavefrom you attached is not nice to me to analysis the VBUS, FB, CC1 and CC2 relationshp. Could you please mark the voltage value of each signal?

VBUS is ??

CC1 is ??

CC2 is ??

FB is ??

And I am looking for the wavefrom which is screen shot Type-C attached (From un-attach to attach).

2. The CC log is the CC negotiation message on CC line. You can use a similar Tool as CY4500 to catch it. CY4500 link: https://www.cypress.com/documentation/development-kitsboards/cy4500-ez-pd-protocol-analyzer

Best Regards,

Lisa 

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