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USB EZ-PD™ Type-C Forum Discussions

AndyKim
Level 1
Level 1
5 replies posted 10 sign-ins 5 sign-ins

Hello,

I design below board from CCG3(CYPD3123) CTD Reference Board.

I'd like to change power role into Power source.(From board to USB type-C)

Would you please let me know which part should be changed in SDK(CYPD3123-CTD)?

CYPD3123_Dock.png

Thank you so much in advance.

Regards.

AndyK

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1 Solution
PranavaYN
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 50 likes received

Hi,

Thanks for sharing the log files. This helps narrow down the issue. I observe in the log, the CCG3 is acting as a sink, which is the reason, the VSEL lines are not changing.

The Charge Through Dongle configuration is fixed to be a DRP. It will be Sink if the below highlighted port is not connected thereby drawing power from the notebook.

PranavaYN_0-1675182456110.png

Are you using the hardware similar to the above design? We can force the CCG3 to be Source always through firmware but that would affect the functionality if the above design is what you are expecting.

Please refer to the following thread - https://community.infineon.com/t5/USB-EZ-PD-Type-C/CCG3-charge-through-dongle-firmware/td-p/54364

The marked solution for the thread has the code required to force CCG3 to be Power Source and data UFP. You can reuse that code directly. Include px_swap.c and .h file and call dock_task(port); in the main loop.

Regarding CCG4 design, as per PD Spec it is required to have USB Billboard functionality if we are implementing any alternate modes. Therefore we would need a billboard controller in this design.

 

Best regards,
Pranava

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8 Replies
PranavaYN
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 50 likes received

Hi,

If you want CCG3(CYPD31 to be Source always you can configure it directly using EZ-PD Configuration Utility - https://www.infineon.com/cms/en/design-support/tools/configuration/usb-ez-pd-configuration-utility/

Please refer to user manual of this utility to understand how to configure the firmware. 

You can change Port Information > Port role   to set it to Source. Then configure the Source PDOs necessary.

Please let me know if I understood your requirement correctly or you want to switch port role during runtime.

Best regards,
Pranava
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Hello,

I tried to change Port role to set it to Source and add 3 Source PDOs(PDO1~3 : 9V, 15V, 20V).

and add some lines(VSEL1, VSEL2) in config.h,

config_jpg.jpg

But, Voltage is not changed at all. VSEL1,2(GPIO) not changed. 

I am sorry that I am not good at F/W.

Would you please help me what should I do?

Thank you so much.

Regards.

AndyK

 

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PranavaYN
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 50 likes received

Hi,

Is it possible to share the firmware project or at least the hex binary you have built? I will check on my end and get back to you. Also, please make sure you are using a valid PD source/sink. 

Change the APP_VBUS_SET_5V_P1() implementation to different configurations as below,

1. VSEL1 = 1 VSEL2 =0

2. VSEL1 = 0 VSEL2 = 1

Then connect a device and see if the VSEL lines reflect these changes and let me know the results.

Do you have any PD protocol analyzer like CY4500 ? If yes, please do share the analyzer trace. Analyzer will help quicken the debug. 

https://www.infineon.com/cms/en/product/evaluation-boards/cy4500/

 

Best regards,
Pranava
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Hello,

Thank you for your kind support.

2 .hex file attached.

One is from EZ-PD CCGx SDK (CYPD3123-40LQXI_ctd_us), another is from CYPD3123-40LQXI_Example which is download from Lisa's answer(?) before.

I tried to change VSEL1 & VSEL2 in APP_VBUS_SET_5V_P1(), but failed not changed.

I ordered CY4500 today, I don't have it now..

I will try to solve this CYPD3123 Board for a few days, and if it will failed, I am going to design new board with CYPD4236(Block diagram attached.) from CCG4_CYPD4235_Dock_Reference_Design. 

CYPD4236_MonitorDock_Design.png

Is CYPD4236_Board required many F/W changes as well ?

Thank you so much.

Regards.

AndyK

 

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PranavaYN
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 50 likes received

Hi,

Sorry for the delay in responding. 

Did you receive the CY4500 Analyzer? If so, please share the trace. 

The configuration you have done for CYPD3123 looks fine. I am not sure where the issue is.

For CYPD4236, If you are replicating the design completely, then there won't be much changes in firmware. You will just need to configure the device using EZ-PD Configuration Utility.

Best regards,
Pranava
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Hello,

I'd like to appreciate for your support.

CC protocol file is attached.(2 files)

For CYPD4236, Do I need to add USB Billboard Controller?

Thank you so much.

Regards.

AndyK

 

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PranavaYN
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 50 likes received

Hi,

Thanks for sharing the log files. This helps narrow down the issue. I observe in the log, the CCG3 is acting as a sink, which is the reason, the VSEL lines are not changing.

The Charge Through Dongle configuration is fixed to be a DRP. It will be Sink if the below highlighted port is not connected thereby drawing power from the notebook.

PranavaYN_0-1675182456110.png

Are you using the hardware similar to the above design? We can force the CCG3 to be Source always through firmware but that would affect the functionality if the above design is what you are expecting.

Please refer to the following thread - https://community.infineon.com/t5/USB-EZ-PD-Type-C/CCG3-charge-through-dongle-firmware/td-p/54364

The marked solution for the thread has the code required to force CCG3 to be Power Source and data UFP. You can reuse that code directly. Include px_swap.c and .h file and call dock_task(port); in the main loop.

Regarding CCG4 design, as per PD Spec it is required to have USB Billboard functionality if we are implementing any alternate modes. Therefore we would need a billboard controller in this design.

 

Best regards,
Pranava
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Hello,

Great. It works!!!

I really appreciate for your kind support.

Thank you so much.

Regards.

AndyK

 

 

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