CY4532 Debugging

JeGr_4019896 · ‎Mar 12, 2019

I have loaded a single PDO into the CY4532 EVK and noticed that the there is a hard reset that occurs on the CC line after PD negotiations have taken place and the current draw is as expected. This reset lasts for about a second and the the PD devices renegotiate with no problem. I am wondering why this could be happening.

I attempted to debug the EVK and step through the code to see if I could see the problem but when I run the debugger and get to the function, dpm_task(port), the debugger disconnects. Should I be able to step through the code this way?

JeGr_4019896 · ‎Mar 13, 2019

My setup is as follows: CY4532 EVK with 5V/3A Source PDO with iPad Pro 11" 3rd Generation.

After negotiations are complete, there is a hard reset. After a period of time, the negotiation takes place again the EVK works as expected. I have included my CC log describing this behavior.

I have tracked down what I believe to be the piece of code being called to display the hard reset.

case APP_EVT_TYPEC_ATTACH:

#if CCG_REV3_HANDLE_BAD_SINK

/* Start bad sink timer */

timer_start(port, APP_BAD_SINK_TIMEOUT_TIMER, APP_AME_TIMEOUT_TIMER_PERIOD, app_bad_sink_timeout_cbk);

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CY4532 Debugging

Re: CY4532 Debugging