CCG3 NGDO control of external FETs

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damac_1605476
Level 1
Level 1
First reply posted First question asked Welcome!

I have a project where I'm trying to use the NFET drivers on a CCG3 (CYPD3125-40) to switch some FETS. I am not currently using the USB-C software, just some some simple code to try and control the FETS from the NGDO_CTRL_0 register. 

I have a 12V source connected to VBUS_P, then through a 0.01 Ohm resistor to OC. Then to two N-Channel FETS whose gates are tied to VBUS_P_CTRL0 and VBUS_P_CTRL1. 

I am writing to the USPD_NGDO_CTRL_0 register to turn on VBUS_P_CTRL0 and VBUS_P_CTRL1. I can see that these lines change when I write to the registers, but the voltage is not going above VBUS_P which is what it needs to do to turn on a N channel FET. It is like the charge pump is not referenced to VBUS_P. 

From this description can you tell if I need to set up some of the other USPD registers in order to make this work, or have I possibly damaged the IC (everything else seems to work OK - but not currently using the USBPD section) 

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1 Solution
Sananya_14
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hello,

As per my understanding, you dont have any PD device connected to CCG3 but would like to turn on the NFETs directly from the application firmware. Please check the code in the pd_internal_pfet_on() API from the CCG3 Host SDK project where the USBPD_NGDO_CTRL_0 register is set for each FET based on the drive mode with a delay and then USBPD_NGDO_CTRL_P register to reset the edge detector. If the voltage of the VBUS_P_CTRL lines still dont reach the expected level, please provide the waveforms and your schematic for our reference.

Best Regards,
Sananya

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1 Reply
Sananya_14
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hello,

As per my understanding, you dont have any PD device connected to CCG3 but would like to turn on the NFETs directly from the application firmware. Please check the code in the pd_internal_pfet_on() API from the CCG3 Host SDK project where the USBPD_NGDO_CTRL_0 register is set for each FET based on the drive mode with a delay and then USBPD_NGDO_CTRL_P register to reset the edge detector. If the voltage of the VBUS_P_CTRL lines still dont reach the expected level, please provide the waveforms and your schematic for our reference.

Best Regards,
Sananya

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