using DTCM memory in ARM_M7(CYT4BFX) micro controller

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bankireddypali
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Hi All,

I am trying to move stack into DTCM memory area instead of SRAM area ,But I am getting BUS error when I am trying to access DTCM area in ARM_M7(CYT4BFX) micro controller.

Could you please let me know are there any steps to be executed as part of startup code to  enable DTCM memory area?.

I am trying to speedup software execution ,what part of my software can I move to DTCM /ITCM ?.

Regards,

Bhaskar 

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Hi @bankireddypali ,

You can refer the attached snippet below, where CM7 internal address for its Data TCM is "0x2000 0000".

KumarAP_0-1660135384583.png

 

So if you are executing from CM7_0 and also accessing CM7_0 DTCM, then address range will be from "0x2000 0000 to 0x2000 3FFF".

Refer below snippet for more clarification :

KumarAP_1-1660137453954.png

 If another/external master is accessing the CM7_0 DTCM, then  address range will be from  0xA0010000 to 0XA0013FFF and for CM7_1 DTCM, address range will be from "0xA011 0000 to 0xA011 3FFF".  Refer below snippet and section "4.6.2.7 " of TV-II BH Architecture TRM document:

KumarAP_2-1660137624300.png

Thank you.

Regards,

Apurva

 

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KumarAP
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Hi @bankireddypali ,

I would suggest you to refer the latest SDL-7.5.0, which is available on below link :
Link for latest SDL : https://softwaretools.infineon.com/tools/com.ifx.tb.tool.traveoiisampledriverlibrary

First you can verify that DTCM is enabled or not by checking the hardware register bits(ITCMCR.EN, .RMW and .RETEN fields). If not enabled, please enable in cm7 startup file.
For this you can refer the "startup_cm7.arm" file which is available at path -->> (T2G_Sample_Driver_Library_7.5.0\common\src\startup\ghs),
and also refer the attached screenshot(i.e. dtcm_enable_reference.jpg) for same.

For moving the stack into DTCM memory area, You can refer the "linker_directives.ld" file which is available at path -->> (T2G_Sample_Driver_Library_7.5.0\tviibh8m\tools\ghs\linker_directives.ld).
You can try by commenting the macro "LINK_CM7_STACK_HEAP_TO_SRAM_NOT_DTCM", and refer the attached screenshots(linking_stack_to_DTCM_specific_macro.jpg, linking_stack_to_DTCM.jpg) for same.

To speedup software execution, it depends on your requirement but as general you can move stack and heap. For cm7_x, please take care that DTCM and ITCM have only 16KB memory for each.

Also you can refer the "tcm" example available at path -->> (T2G_Sample_Driver_Library_7.5.0\tviibh8m\src\examples\tcm).
Please take a look into below thread also :
https://community.infineon.com/t5/TRAVEO-T2G/cyt4bf-set-heap-and-stack-to-DTCM/td-p/358935

Hoping above resolves your query.

Thank you.
Regards,
Apurva

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bankireddypali
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Hi Kumar/Apurva,

Thank you very much for your reply. I tried to use following functions to enable DTC memory from tcm example code (Traveo_ii_SDL\tviibh8m\src\examples\tcm\main_cm7_0.c) ,but that is resulting an exception. Please find attached screenshots, Could you please let me know if I am still missing something?. Many thanks.

temp = CPUSS->unCM7_0_CTL.stcField.u4PPB_LOCK;
temp = temp & 0xC;
CPUSS->unCM7_0_CTL.stcField.u4PPB_LOCK = temp;
// Enable DTCM
Cy_Cpu_TcmEnable(CY_CPU_CM7_0, CY_CPU_DTCM);
// Enable DTCM RMW
Cy_Cpu_TcmReadModifyWriteEnable(CY_CPU_CM7_0, CY_CPU_DTCM);
// DTCMCR EN/RMW/RETEN enabled to access DTCM
CY_SET_REG32(0xE000EF94, 0x2F);

bankireddypali_0-1660125019279.pngbankireddypali_1-1660125113902.png

 

 

Regards,

Bhaskar

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bankireddypali
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Hi Kumar/Apurva,

As I see DTCM memory area is chosen as 0x20000000UL in example program, But in our micro device data sheet ,CM7_0 Data TCM is from 0xA0010000 to 0XA0013FFF,I mapped  this address range 0xA0010000 to 0XA0013FFF for stack and heap, But I am getting exception when accessing this memory.

@KumarAP Could you please confirm?. Many thanks.

// CM7 DTCM Region
#define DTCM_SELF_RAM_ADDR (0x20000000UL)

bankireddypali_2-1660126599346.png

bankireddypali_3-1660126975730.png

 

Regards,

Bhaskar

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Hi @bankireddypali ,

You can refer the attached snippet below, where CM7 internal address for its Data TCM is "0x2000 0000".

KumarAP_0-1660135384583.png

 

So if you are executing from CM7_0 and also accessing CM7_0 DTCM, then address range will be from "0x2000 0000 to 0x2000 3FFF".

Refer below snippet for more clarification :

KumarAP_1-1660137453954.png

 If another/external master is accessing the CM7_0 DTCM, then  address range will be from  0xA0010000 to 0XA0013FFF and for CM7_1 DTCM, address range will be from "0xA011 0000 to 0xA011 3FFF".  Refer below snippet and section "4.6.2.7 " of TV-II BH Architecture TRM document:

KumarAP_2-1660137624300.png

Thank you.

Regards,

Apurva

 

bankireddypali
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5 replies posted 5 sign-ins First like given

Hi @KumarAP ,

Thank you very much for reply. Now am able to move stack and heap into DTCM area ,But unfortunately CPU Load is not decreased instead increased slightly. 

I would like to make use of ITCM as well ,but not sure what content I can move to ITCM RAM  ,Could you please suggest ,in general what contents can be run in ITCM?, Can I move  constants /interrupt vector table  e.t.c ?.

Regards,

Bhaskar

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Hi @bankireddypali 

There is no such generic recommendation from our side for which content can be moved to ITCM. But you can try to move vector table to ITCM using linker attributes. Typically one would probably link frequently executed code there (some OS task handling / scheduler stuff maybe), but it is not guaranteed that performance will increase.

FYI, Please also have a look at chapter 8.2 in the following document from Arm, which targets the Cortex-R5 processor, but this information probably applies to Cortex-M7 as well:
https://silver.arm.com/download/download.tm?pv=1645709
Note: you may need to create an account there first, if you don't have one already.

Thank you.

Regards,

Apurva

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