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xinyu
Level 2
Level 2
10 sign-ins 5 questions asked 10 replies posted

请问在配置PWM时钟频率的时候,这个divider参数是什么意思呢?可以详细解释下吗?

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Jimmy_L
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 50 solutions authored

你好,

这个divider是指你选用的clock分频设置多少分频。要理解这个参数,你要看Cy_SysClk_PeriphAssignDivider这个函数,这个函数的由来要看clock的分配,下图应该比较清晰的给出了来龙去脉

JimmyLiu_0-1689319772347.png

具体的您可以参考TRM关于clock的分配或者看application note AN220208_Clock_Configuration_Setup_in_Traveo_II_Body_Entry_Family

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Jimmy_L
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 50 solutions authored

你好,

这个divider是指你选用的clock分频设置多少分频。要理解这个参数,你要看Cy_SysClk_PeriphAssignDivider这个函数,这个函数的由来要看clock的分配,下图应该比较清晰的给出了来龙去脉

JimmyLiu_0-1689319772347.png

具体的您可以参考TRM关于clock的分配或者看application note AN220208_Clock_Configuration_Setup_in_Traveo_II_Body_Entry_Family

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xinyu
Level 2
Level 2
10 sign-ins 5 questions asked 10 replies posted

感谢回答

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