TRAVEO™ T2G Forum Discussions

Hi Team,

Couldn't find the CAN Mailbox definitions in SDL Libraries. Is there a way to configure the mailbox in TRAVEO 2 CYT2CL?

Thanks,
Pradeep

Hello: Recently, during motor development, I used SPI to control a MOS driver to turn on and off the motor.

The following problem occurs when sending data via SPI in PWM interrupt.

1. Use Cy_SCB_SPI_Transfer function to send, query the sending status, the bit is always in the state of sending, resulting in the program has been stopped here, not in the interrupt send to send can be sent to complete.

2. Using Cy_SCB_SPI_WriteArray function can finish sending in PWM interrupt, but can't read the data received by SPI synchronously.

Thanks. 2923328@qq.com

Mr Wild 24.04.03

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/%E5%9C%A8%E7%94%A8SPI%E5%9C%A8PWM%E4%B8%AD%E6%96%AD%E4%B8%AD%E5%8F%91%E9%80%81%E5%A4%B1%E8%B4%A5/td-p/727700

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/TRAVEO-T2G-CYT3-CYT4-DEEPSLEEP-mcu%E5%8A%9F%E8%80%97/td-p/723660

The Real Time Clock (RTC) incorporates an automatic leap year correction for the date field. This includes the following features:

1. Leap Year Correction:

   • The RTC automatically adjusts for leap years in the date field, specifically focusing on the day of the month.
   • In instances where the year is divisible by four, the month of February (Month=2) will consist of 29 days instead of the standard 28.

2. Century Rollover:

   • When the Year field transitions from 99 to 00, it is essential for the firmware to update the typically static century value. This update is crucial for ensuring the accuracy of date information.
   • This rollover triggers an interrupt known as the century interrupt.

To test the triggering of the Century Interrupt using the Sample Driver Library (SDL), we followed the below steps for capturing the century interrupt in a loop. The provided code example illustrates a use case with a single capture. The steps are as follows:

1. Reset the backup logic
2. Configure and enable the WCO (Watch Crystal Oscillator)
3. Configure and enable the RTC interrupt
4. Unmask the Century interrupt
5. Set the time
6. Wait for 10 seconds
7. Verify that the century interrupt fires
8. Reset the backup logic
9. Configure and enable the WCO
10. Configure and enable the RTC interrupt
11. Unmask the Century interrupt
12. Set the time
13. Wait for 10 seconds
14. Verify that the century interrupt fires

For further details, please refer to the attached code example RTC_CenturyInterrupt.c. If you require more information about any specific step or aspect of the RTC functionality, feel free to ask!

The ADC is triggered with tcpwm, the ADC triggers the dma. 2048 points are captured and transported into the interrupt. The time interval to enter the interrupt is about 250ms, the target array is 16 bits, and the datasize is 16 bits. If srcTxfrSize is set to 1, the time to enter interrupt will be shortened to 150ms. If I replace the ADC result register with a 16-bit array as the source array and set srcTxfrSize to 0, the time to enter interrupt will be 250ms, how to solve this problem? Thank you for your help.

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/cyt4bb-DMA%E4%BC%A0%E8%BE%93%E6%97%B6%E9%97%B4%E5%BC%82%E5%B8%B8/td-p/690170

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B73-%E4%BD%BF%E7%94%A8greenhills%E7%BC%96%E8%AF%91%E5%99%A8%E6%97%B6-%E6%97%A0%E6%B3%95%E5%B0%86%E6%95%B0%E7%BB%84%E5%90%8D%E5%BC%BA%E5%88%B6%E8%BD%AC%E6%8D%A2%E4%B8%BA%E5%87%BD%E6%95%B0%E6%8C%87%E9%92%88-%E5%BA%94%E5%A6%82%E4%BD%95%E8%A7%A3%E5%86%B3/td-p/687609

Important:

the description is not to be considered as not 100% reliable and not warranty is given for correctness. It just corresponds personal experience and understanding of the topic.
to be confirmed by the MTB / smart I/O experts

Example:

• Port Pin P17_2 is signal source and replicated on Port Pin P17_1 buffer, if drive strength is not sufficient.
• The HSIOM setting is getting configured as 0x00 (port pin function).
• Note: signal is not sync'ed by common clock in this case.

Background:
Smart I/O is working like a bridge. With smart I/O block the selected function (GPIO or fixed function peripheral like UART, SPI) can be manipulated. In this case the Bypass Mode for this signal index [x] is disabled and the signal passed the LUT[x] probably. Hereby the user decides, if he wants to modify the input/output path.

How to:

1. Open Device Configurator
2. Configure both pin as Port Function and define drive Mode STRONG (Push&Pull). Input Buffer not used here
3. Open Smart I/O configurator
4. Chip Terminal [1]/[2] are configured as "none". In this case probably the previous HSIOM setting (port pin function: 0x00) keeps unchanged.
5. I/O terminal [1]/[2] are configured as output.

Note:
When the I/O terminal is configured as "none", it has not impact to smart I/O path and the pin driver, as long as the LUTs are configured. Possible reason is, that by configuration of a LUT, the smart I/O "Bypass" is disabled and the signal [x] is going through its LUT[x].

Below some screenshots

I want to know the chip with related SDK?

Its SDK support those systems? AUTOSAR?RTOS?

Excuse me, where CAN I get related information