TRAVEO™ T2G Forum Discussions
Dear:
1, The MCU is running ,i use the miniprog3 and Auto Flash Utility to erase flash,but i can not connect the target.
2, the log as below:
PS C:\Program Files (x86)\infineon\Auto Flash Utility 1.3\bin> .\openocd.exe -s ../scripts -f interface/kitprog3.cfg -c "transport select swd" -f target/traveo2_8m_b0.cfg -c "targets; shutdown"
Open On-Chip Debugger 0.11.0+dev-1.3.0.1958 (2022-02-14-10:58)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* traveo2_8m.cpu.cm0 cortex_m little traveo2_8m.cpu unknown
1 traveo2_8m.cpu.cm70 cortex_m little traveo2_8m.cpu unknown
2 traveo2_8m.cpu.cm71 cortex_m little traveo2_8m.cpu unknown
shutdown command invoked
PS C:\Program Files (x86)\infineon\Auto Flash Utility 1.3\bin> .\openocd.exe -s ../scripts -f interface/kitprog3.cfg -c "transport select swd" -f target/traveo2_8m_b0.cfg -c "init; reset init; flash erase_sector 0 0 last; shutdown"
Open On-Chip Debugger 0.11.0+dev-1.3.0.1958 (2022-02-14-10:58)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
Info : Using CMSIS-DAPv2 interface with VID:PID=0x04b4:0xf151, serial=1B1D0B1D03201400
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: JTAG supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.40.1241
Info : KitProg3: Pipelined transfers enabled
Info : KitProg3: Asynchronous USB transfers enabled
Info : VTarget = 3.284 V
Info : kitprog3: acquiring the device (mode: reset)...
Error: kitprog3: failed to acquire the device
Info : clock speed 2000 kHz
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: DAP 'traveo2_8m.cpu' initialization failed (check connection, power, transport, DAP is enabled etc.)
Info : traveo2_8m.dap: powering down debug domain...
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Warn : Failed to power down Debug Domains
3, can you help to give us some suggestions for this?Thanks very much!
Show LessHey,
sorry in advance for my 3th post in the kind same problem. I m using the CY3BB5CEE device of the Trasveo2 family and the 7.7.0 driver library.
I want to program SFLASH 0x1700 0000 and I investigated the additional code examples
TRAVEO™ T2G Sample driver Library Code - Infineon Developer Center
loads, but could not find any example using the WriteRow 0x05 Systemcall
I even can not find this opcode param in the SDL
v7.7.0
or v7.9.0
I can execute the read efuse or silicon id system calls like
Hello,
when using 21_ANxxxxxx_eFuse_ReadWrite example in my finished firmware code, I can read out Silicon ID with output like
SiIdReadValues = (
familyIdHigh = 1,
familyIdLow = 7,
majorRevisionId = 1,
minorRevisionId = 2,
lifeCycleState = CY_LIFE_CYCLE_STATE_NORMAL_PROVISIONED,
protectionState = CY_PROTECTION_STATE_NORMAL,
userEfuseData = (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0))
So I would expect setup IRQ 0 and IRQ1 for SROM API is fine?!
When I try reading efuse byte like
Show Less
Dears,
I have questions about the CAN Interface.
CYT2BL5CAS has a total of 8 CAN channels. There are 4 channels in CAN0 and 4 channels in CAN1.
Q1. If all 8 channels are set to CAN-FD, can they operate individually?
Q2. When using CAN-FD and HS-CAN(High Speed CAN), should I configure only CAN-FD in CAN0 and HS-CAN in CAN1?
Should I set it up separately like this? Or can I assign both HS-CAN and CAN-FD to CAN0?
Thanks and Regards,
YS
Dears.
Now I’m using CYT2B9 series.
I’m wondering that what stable interval time it is after VDDD falling voltage to deassert POR for 5 times continuous reset test.
Best regards,
Kevin Han.
Show LessHi dears,
I'm using the Traveo 2 CYT4DN on the "T2G CYTVII-C-2D-6M-327-SET evaluation board" and I have access to MyICP and Traveo Documentation site. Unfortunately I cannot find the documentation which describes the functionality of each features such as MIPI or graphics (especially direct capturing to display) and all the register descriptions.
My desired use case:
I would like to capture the video stream of the MIPI CSI camera which is connected on the eval board and show the video stream on the display which comes together with the eval board. My use case is not to use the VRAM but capture the input data of the MIPI interface and forward them directly to the display.
I already checked out the examples mipi-sensor and in the Lauterbach debugger i was able to see the input data in the VRAM but I don't want to use VRAM and would like to capture the input data directly as mentioned before.
Thanks,
Best regards.
Hello,
after longtime test 5-6 days my CAN communication to GUI breaks down. When debugging I figured out, the Cy_CANFD_IrqHandler() is still executed when GUI send msgs but inside the