TRAVEO™ T2G Forum Discussions

CYT2B75的手册中没有ADC详细的说明，每个ADC支持内部6个连接用于诊断和监测，文档没有看到详细的描述。

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Hello, everyone.

I want to use SCB Uart's Baudrate set to 2M.

And I have questions like this.

1. When I use CTX/RTX Port, Is there a case where it needs to be controlled except when setting it up?

2. In this case, should I set the OVS value to 20 and the Divider value to 2?(Peripheral Clock is 80 MHz.)

3. In this case, how do I calculate the error rate?

When I use Fractional Divider, there is a difference between the target baudrate and the real baudrate, so we calculated it as follows.

(Target Baudrate - Real Baudrate)/Target Baudrate * 100

However, if it is 2M, the target Baudrate and Real Baudrate match, so the error rate is zero.

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The chip I am currently using is CYT2B75BADQ0AZEGS. Now I want to know the difference in the time it takes to read, erase, and write to Work Flash and Code Flash of the same size. I consulted the data sheet for the chip. But only find above the instructions for the time it takes to chip erase and write. I know the chip has two cores. Different kernels access Flash in different ways.

 

I would like to ask you some questions:

(1) I want to know the difference in the time it takes to read, erase, and write to Work Flash and Code Flash of the same size. (2)I also want to know what the assembly Code looks like when erasing, writing, and reading Work Flash and Code Flash.

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The CANFD driver is provided in the TRAVEO T2G Sample Driver Library files. Is there also a Classic CAN driver files?

T2G_Sample_Driver_Library_7.8.0\common\src\drivers\canfd
- cy_canfd.c
- cy_canfd.h

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Dears.

 

Now I use event generator in CYT2B98CAS with evaluation board of CYTVII-B-E-176-SO.

Event generator operation is working well. Whenever event generator triggers interrupt like 20ms, it enables output gpio pulse. (No problem)

However, strange thing is that if I hook up the T32 debugger to this EVB and evoke software FW like run time debugging,

Interval interrupt time of event generator is more extended like it triggers event generator interrupt every 50ms.

 

Could you tell me why it happened inside of it?

 

Software environment is as the following.

Used SDL version : SDL 7.9.0

Reference Code : T2G_Sample_Driver_Library_7.9.0\tviibe2m\src\examples\evtgen\dpslp_wakeup

Main clock : IMO

DeepSleep Event Generator Interval : 20ms

Best regards,

Kevin Han.

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hello, dear infineon engineer. recently i am using a evaluation board. the board info silk print like this : TVII-B-H-8M-320-BGA CPU 600-60569-01 REV 02. WW:2009 the main cup type is CYT4BFCCHDES.... I am not so sure about the name format. but when i tried to run the example in the SDL, I foud the GPIO example not light the led. D:\traveo2\TVII_Sample_Driver_Library_6.4.0\tviibh8m\src\examples\gpio\button my SDL version is above,what's more i try a new SDL D:\traveo2\T2G_Sample_Driver_Library_7.5.0\tviibh8m\src\examples\gpio\button my question is 1 . why may CPU type not appeared in the bb_bsp_tviibh8m.h either CY_USE_PSVP = 1 OR 0. 2. which SDL i need to use to run the GPIO led demo succeed. 3. i can compile the demo, and flash it in IAR debug node,the run is ok ,but not got the right result. what the root cause, is the pin map not ok. how can i use the this board to run the demo succeed. thank you a lot! Show Less

Hi
I am using CYT2B9 and CYT4BF series.

 

I have a question about SAR ADC Vmotor / ADC[x]_M.
I was able to see “One channel is also reserved for motor sensing inputs” in the Architecture TRM-35.SAR ADC.

Q) What is the difference between ADC[x]_M and ADC[x]_y channels for motor sensing input?
(ex. Noise, Compensation, etc...)

 

Best & regards

taegyunahn

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Dear Community, 

I would like to toggle the LED 1 (P.19.0) and LED 4 (P12.2) on my board. How I configure, initilaze the ports and pins in the source code? 

Does anyone has an example code for blinky LED? 

best regards,

Patrick 

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I am trying to run T2G_Sample_Driver_Library_7.9.0 using GHS MULTI and CYTVⅡ-B-E-100-SO.

I have a question about the definition of CPU_BOARD_REV in tviibe1m_common.gpj.
In the comments, it says "A, B or C (and so on)", but when I look at the board (CYTVⅡ-B-E-100-SO), the board revision seems to be "REV 2.0".

If I use this board, what value should I set for CPU_BOARD_REV?

 

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