TRAVEO™ T2G

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Changjiang
TRAVEO™ T2G
According to TRAVEO™ T2G Automotive Body Controller Entry Family Architecture Technical Reference Manual (TRM) 20.6 Debug Mode, Table 20-5. Debug Mode... Show More
WoHa_955446
TRAVEO™ T2G
Dears. Now I tried to configure gpio port 6_1 as input, HighZ, CMOS for wake-up interrupt of DeepSleep in CYT2B95CAS. After MCU goes Deepsleep, when I... Show More
yuejin
TRAVEO™ T2G
Hi! I have a  problem。 In M4 Core ,I use Cy_Flash_BlankCheck to check the address,the function return CY_FLASH_DRV_FLASH_NOT_ERASED。But I read the add... Show More
wu_zhanjun
TRAVEO™ T2G
For safety related application (ASIL B) without OS (e.g. AUTOSAR), the MCU CYT4BF core test (e.g. CPU/ALU test, etc) is planned to be implemented. Bec... Show More
chme_4646286
TRAVEO™ T2G
基于CYTVII-B-E-1M-SK验证SDL7.3 TCPWM timer功能,示例代码路径如下: T2G_Sample_Driver_Library_7.3.0\tviibe1m\src\examples\tcpwm\timer 附件是验证的cm4代码(“tviibe1m_flash_cm4_m... Show More
chme_4646286
TRAVEO™ T2G
请教一个TCPWM Capture输入配置的问题; 基于CYT2B7系列,我需要一个把P6.0和P6.1配置为外部capture输入,参考datasheet,其ACT#3和ACT#2支持; 那我在代码编写中要如何选用对应的tr_one_cnt_in[nnumber]呢? 在SDL 头文件中P6.0... Show More
Sungwook
TRAVEO™ T2G
Hibernate mode would be used for low power mode.  I'd like to know the meaning of "Retention" and "IsDeepSleep" in TRM.  case 1.  Retention is "Retain... Show More
ReitA
TRAVEO™ T2G
Hello, I have the problem that I have to wakeup from DeepSleep Mode over Can.I'm using the CANFD0 Channel #1 with the adress of 0x40520200. The proble... Show More
KIM-MANSEOK
TRAVEO™ T2G

How can I get the code snippets, SDL, and tools used in AN228680?

Have a nice day.

 

Akhileswar_B
TRAVEO™ T2G
Issue :: Precision of the frequency measured is affected at higher rates of input(example: 2KHz) I am using a input tick frequency of 62500 in my ICU ... Show More
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TRAVEO™ T2G

Discussion forum regarding 32-bit TRAVEO™ T2G Microcontroller - based on ARM® for automotive body electronics applications; cutting-edge performance, safety, and security features topics.
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