TRAVEO™ T2G

Dears.

Now I tried to configure gpio port 6_1 as input, HighZ, CMOS for wake-up interrupt of DeepSleep in CYT2B95CAS. After MCU goes Deepsleep, when I put the signal which has the voltage level of 3V divided by resister divider(Higiside:4K, Lowside:3.3K) from ignition S/W(12V) to this port, MCU got waken up from Deepsleep.

I understood as the following for CMOS drive mode

1. VDDD : 5V

2. Input Voltage High Threshold in CMOS : 0.7 × (VDDD or VDDIO_1 or VDDIO_2) : 3.5V

3. Hysteresis Area : From 1.5V to 3.5V

4. Input Voltage Low Threshold in CMOS : 0.3 × (VDDD or VDDIO_1 or VDDIO_2) : 1.5V

The voltage level of 3V puts to port6_1 is in Hysteresis Area so I believe that is correct MCU should not be waken up by 3V. That means that in the case of voltage leve to port6_1 is more than 3.5V, it's common that MCU should be waken up. Could you review my understanding that is Right or Wrong?

Best regards,

Kevin Han.

Hi！

I have a  problem。

In M4 Core ，I use Cy_Flash_BlankCheck to check the address，the function return CY_FLASH_DRV_FLASH_NOT_ERASED。But I read the address，it will go the hardfault。

code：

uint32_t  ReadWFlashU32 (uint32_t add)

{

    uint32_t ret;

    cy_stc_flash_blankcheck_config_t blankCheckConfig;

   blankCheckConfig.addrToBeChecked = (uint32_t*)add;
   blankCheckConfig.numOfWordsToBeChecked = 0x1u;

   if ( CY_FLASH_DRV_FLASH_NOT_ERASED == Cy_Flash_BlankCheck(NULL, &blankCheckConfig,    CY_FLASH_DRIVER_BLOCKING))

   {
        ret = (*(uint32_t *)add); 
   }

   else
   {
        ret = 0x00000000uL;
    }

    return (ret);

}

For safety related application (ASIL B) without OS (e.g. AUTOSAR), the MCU CYT4BF core test (e.g. CPU/ALU test, etc) is planned to be implemented.

Because there is no HW mechanism to ensure the correct CPU functionality, Cypress as the owner of MCU, can Cypress share with us the proposal and solution to implement the MCU core test? e.g. demo code, API interface, etc, not based on OS (e.g. AUTOSAR).

Your response will be appreciated in advance!

基于CYTVII-B-E-1M-SK验证SDL7.3 TCPWM timer功能，示例代码路径如下：

T2G_Sample_Driver_Library_7.3.0\tviibe1m\src\examples\tcpwm\timer

附件是验证的cm4代码（“tviibe1m_flash_cm4_mc_template.eww”工程）；

目前出现的问题是：

TCPWM计数时钟配置为10MHz，当周期寄存器设置为5us时，通过IO翻转，实测波形正常；

当把周期寄存器配置成1us时，发现IO翻转波形出现异常，如下所示：

无论是波形周期，还是占空比，都出现错误；

请问出现该问题的原因是IO不支持高速翻转，还是TCPWM配置错误呢？

如果是IO翻转有频率限制，那datasheet哪里有对应的参数说明？

期待答复，谢谢~~

请教一个TCPWM Capture输入配置的问题；

基于CYT2B7系列，我需要一个把P6.0和P6.1配置为外部capture输入，参考datasheet，其ACT#3和ACT#2支持；

那我在代码编写中要如何选用对应的tr_one_cnt_in[nnumber]呢？

在SDL 头文件中P6.0和P6.1定义的tr_one_cnt_in[]，为什么会有两种呢？二者之间的关系是？

Hello,

I have the problem that I have to wakeup from DeepSleep Mode over Can.
I'm using the CANFD0 Channel #1 with the adress of 0x40520200.

The problem I receive is that on the Transceiver bus communication is recognized and the WakeUp Event is set.
Now for validation of the Can-Messages the Controller needs to call the CanRx-Interrupt that the validation can be started.

When the Transceiver is setting the  WakeUp Event, the MCU is set to Active Mode again. Therefore the Interrupt should work again right? But it is never called.

Have or had anyone the same issue and got a solution?

I'm happy for every kind of help.

Thanks

Issue :: Precision of the frequency measured is affected at higher rates of input(example: 2KHz)

I am using a input tick frequency of 62500 in my ICU config. I can use higher rate of tick freq. but in that case I will not be able to measure lower frequency, below are more details with tick frequency info.

62500 - I can measure from 1Hz 

12500 - I can only measure from 2Hz

250000 - I can only measure from 4Hz.

I want to improve my accuracy at higher frequency rates with optimal tick frequency where I will be able to measure 1Hz as well.

Please suggest regarding the same.

Thankyou