Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
sosuc_4336571
Level 1
Level 1

MicroController: Cypress TV-II-B-H-8M-176-CPU

Compiler: GHS 2017.1.4

Debugger: Lauterbach Trace32

Instruction causing issue: strh r5,[r0,#0x1]

(This Compiler generating Instruction is accessing a 64 bit variable of a struct, which is most probably unaligned due to struct packing. Packing of the struct is due to Compiler Optimizations).

Register state:

pastedImage_2.png

pastedImage_3.png

pastedImage_4.png

After executing this Instruction:

pastedImage_5.png

Issue Disappears if:
MPU is disabled through debugger at this instruction and reenabled after this instruction.

Also if I use the "-no_misalign_pack" compiler flag this instruction does not generate and no issue occurs. But the Customer does not like this flag.

According to CortexM7 Generic User Guide, this should not happen for "strh" instruction.

pastedImage_6.png

Kindly suggest if any further detail is required, Thanks.

0 Likes
1 Reply
Roy_Liu
Moderator
Moderator
Moderator
First comment on KBA 10 questions asked First comment on blog

This topic is not suitable to be discussed in the community here, please work with the place who enabled you for this product, as you already did.

Roy Liu
0 Likes